Patents by Inventor Masahiro Koike

Masahiro Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7053455
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: May 30, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Publication number: 20060071321
    Abstract: To provide an excellent image by reducing buckling of a CCD device having one-dimensional CCD elements mounted thereon due to changes in temperature. Blackening treated iron or iron-based alloy is used as a material of a heat sink 11 having a one-dimensional CCD element 14 mounted thereon. The thermal coefficient of expansion of the heat sink 21 is matched with that of a hollow molded case 12 for integrally molding the heat sink 11 and a lead frame 20. A plurality of projections 21 formed on the side of the hollow molded case 12 are disposed at a bonding interface between the glass cap 13 which closes an upper opening of the hollow molded case 12 and side walls of hollow molded case 12.
    Type: Application
    Filed: September 27, 2005
    Publication date: April 6, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Masahiro Koike, Hirochika Narita
  • Publication number: 20050275012
    Abstract: A nonvolatile semiconductor memory device includes a gate electrode portion composed of a floating gate electrode formed above a main surface of a semiconductor substrate of a first conductivity type via a tunnel insulating film, an inter-electrode insulating film formed on the floating gate electrode and formed of a stacked structure film of three or more layers formed of two or more types of high-dielectric material, and a control gate electrode formed above the floating gate electrode via the inter-electrode insulating film, and source and drain regions of a second conductivity type which are formed on the main surface of the substrate with the gate electrode portion being arranged between the source and drain regions.
    Type: Application
    Filed: March 14, 2005
    Publication date: December 15, 2005
    Inventors: Akiko Nara, Masahiro Koike, Yuichiro Mitani
  • Patent number: 6957583
    Abstract: An ultrasonic inspection instrument for detecting a crack and performing sizing in the depth direction of the crack. By a transmitter element array and a receiver element array included in a common sensor, focus points between focused acoustic fields are electronically scanned in a range including a location where half the sum of the transmitting angle of ultrasonic waves to an inspection-target material and the receiving angle of diffraction echoes from the inspection-target material is 30 degrees, so that a tip portion of the crack is detected from the received diffraction echoes. Thus, the detectability of the ultrasonic inspection instrument for detecting diffraction waves in a subject to be inspected and performing crack inspection is stabilized and kept high.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: October 25, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Tooma, Naoyuki Kono, Masahiro Koike, Hirokazu Adachi, Takao Shimura, Makoto Senoo, Tetsuya Matsui
  • Publication number: 20050183505
    Abstract: In order to make it possible in ultrasonic flaw detection to generate ultrasonic waves containing a main beam only by use of an array probe and clearly identify a defect in a specimen by use of images, an element pitch P (the distance between centers of adjacent ultrasonic transducer elements in the array probe) is set longer than ¼ of the wavelength of longitudinal waves generated by the ultrasonic transducer elements and shorter than ½ of the wavelength and reception signals up to time corresponding to the sum of wall thickness round-trip propagation time for longitudinal waves and wall thickness round-trip propagation time for shear waves in the specimen are displayed.
    Type: Application
    Filed: February 4, 2005
    Publication date: August 25, 2005
    Inventors: Naoyuki Kono, Tetsuya Matsui, Masahiro Koike, Masahiro Tooma, Yoshinori Musha, Masahiro Miki
  • Publication number: 20050142769
    Abstract: Disclosed is a semiconductor device comprising a Ge semiconductor area, and an insulating film area, formed in direct contact with the Ge semiconductor area, containing metal, germanium, and oxygen.
    Type: Application
    Filed: December 15, 2004
    Publication date: June 30, 2005
    Inventors: Yoshiki Kamata, Akira Nishiyama, Tsunehiro Ino, Yuuichi Kamimuta, Masahiro Koike
  • Publication number: 20040262741
    Abstract: To provide an excellent image by reducing buckling of a CCD device having one-dimensional CCD elements mounted thereon due to changes in temperature. Blackening treated iron or iron-based alloy is used as a material of a heat sink 11 having a one-dimensional CCD element 14 mounted thereon. The thermal coefficient of expansion of the heat sink 21 is matched with that of a hollow molded case 12 for integrally molding the heat sink 11 and a lead frame 20. A plurality of projections 21 formed on the side of the hollow molded case 12 are disposed at a bonding interface between the glass cap 13 which closes an upper opening of the hollow molded case 12 and side walls of hollow molded case 12.
    Type: Application
    Filed: June 18, 2004
    Publication date: December 30, 2004
    Applicant: NEC Electronics Corporation
    Inventors: Masahiro Koike, Hirochika Narita
  • Publication number: 20040255678
    Abstract: A nondestructive apparatus uses a guided wave. The nondestructive apparatus has a waveform forming apparatus for forming a transmission waveform by employing a reference waveform, a transmitting element for generating the guided wave within an object under inspection based upon the transmission waveform, a receiving element for receiving a reflection wave of the guided wave from an inspection region of the object under inspection, an analyzing apparatus for outputting inspection information which is acquired based upon the reception waveform of the reflection wave received by the receiving element, and the display apparatus for displaying the inspection information.
    Type: Application
    Filed: February 19, 2004
    Publication date: December 23, 2004
    Inventors: Yoshiaki Nagashima, Masahiro Koike, Tetsuya Matsui
  • Publication number: 20040155353
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Application
    Filed: February 6, 2004
    Publication date: August 12, 2004
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Publication number: 20040118210
    Abstract: An ultrasonic inspection instrument for detecting a crack and performing sizing in the depth direction of the crack. By a transmitter element array and a receiver element array included in a common sensor, focus points between focused acoustic fields are electronically scanned in a range including a location where half the sum of the transmitting angle of ultrasonic waves to an inspection-target material and the receiving angle of diffraction echoes from the inspection-target material is 30 degrees, so that a tip portion of the crack is detected from the received diffraction echoes. Thus, the detectability of the ultrasonic inspection instrument for detecting diffraction waves in a subject to be inspected and performing crack inspection is stabilized and kept high.
    Type: Application
    Filed: October 30, 2003
    Publication date: June 24, 2004
    Inventors: Masahiro Tooma, Naoyuki Kono, Masahiro Koike, Hirokazu Adachi, Takao Shimura, Makoto Senoo, Tetsuya Matsui
  • Patent number: 6717279
    Abstract: A semiconductor device can perform resin sealing of an under-fill region and peripheral portion on the side of a semiconductor chip in the same process step, with shortening periods required for filling and curing the under-fill resin and avoiding formation of an internal void, and can simplify fabrication process and component parts. The semiconductor device includes a through opening provided at a predetermined position of the wired substrate, an under-fill region as a gap portion between the wired substrate and the semiconductor chip, and a molded resin portion as peripheral portion along side edge of the semiconductor chip.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: April 6, 2004
    Assignee: NEC Corporation
    Inventor: Masahiro Koike
  • Publication number: 20030168749
    Abstract: A semiconductor device can perform resin sealing of an under-fill region and peripheral portion on the side of a semiconductor chip in the same process step, with shortening periods required for filling and curing the under-fill resin and avoiding formation of an internal void, and can simplify fabrication process and component parts. The semiconductor device includes a through opening provided at a predetermined position of the wired substrate, an under-fill region as a gap portion between the wired substrate and the semiconductor chip, and a molded resin portion as peripheral portion along side edge of the semiconductor chip.
    Type: Application
    Filed: May 19, 2003
    Publication date: September 11, 2003
    Inventor: Masahiro Koike
  • Publication number: 20030167150
    Abstract: A data administration method in a power-generating plant. Process data and operation history data of the power-generating plant are acquired from a power company; equipment-related data including the inspection data of the plant equipment is acquired from a plant maker; and these data are stored in a memory device in the state related to the plant equipment and/or inspection data every power-generating plant. The inspection data of the corresponding inspection data from among data stored in the memory device is extracted in response to inspection data requirement from the plant maker, and the extracted inspection data is provided to the plant maker. In response to the data requirement necessary for the evaluation of said plant configuration equipment from the plant maker, data necessary for the evaluation from among the data stored in the memory device, and the data necessary for the evaluation extracted is provided to the plant maker.
    Type: Application
    Filed: February 27, 2003
    Publication date: September 4, 2003
    Inventors: Takao Shimura, Masahiro Koike, Satoshi Kanno
  • Publication number: 20020167093
    Abstract: A semiconductor device can perform resin sealing of an under-fill region and peripheral portion on the side of a semiconductor chip in the same process step, with shortening periods required for filling and curing the under-fill resin and avoiding formation of an internal void, and can simplify fabrication process and component parts. The semiconductor device includes a through opening provided at a predetermined position of the wired substrate, an under-fill region as a gap portion between the wired substrate and the semiconductor chip, and a molded resin portion as peripheral portion along side edge of the semiconductor chip.
    Type: Application
    Filed: March 6, 2002
    Publication date: November 14, 2002
    Inventor: Masahiro Koike
  • Patent number: 6326670
    Abstract: A semiconductor device includes a Si oxide film formed between a Si substrate and a metallic oxide film is prevented from growing when an annealing treatment is performed after the metallic oxide film is formed, and a method for manufacturing the same. A semiconductor device comprises a silicon substrate, a gate insulating film formed on the silicon substrate and made of the metallic oxide film, and a gate electrode formed on the gate insulating film, wherein an interface film formed between the gate insulating film and the Si substrate is thinner at the ends of the gate insulating film than in the center thereof.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: December 4, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Nishiyama, Masahiro Koike
  • Patent number: 6303983
    Abstract: A semiconductor device includes a lead frame, a semiconductor chip, a resin-encapsulated portion, and tie bars. The semiconductor chip is mounted on a die pad of the lead frame. The resin-encapsulated portion resin-encapsulates the semiconductor chip. The tie bars are provided to outer lead portions of the lead frame to prevent resin leakage during resin encapsulation, and are cut and removed in a finishing step of resin encapsulation. A plating surface is formed on a sectional surface of each of the tie bars. A semiconductor device manufacturing method and apparatus are also disclosed.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: October 16, 2001
    Assignee: NEC Corporation
    Inventor: Masahiro Koike
  • Patent number: 6255031
    Abstract: In a film or panel having excellent near-infrared absorbability and excellent near-infrared shieldability, and having a high degree of visible ray transmittance and good color tone, in order to produce the near-infrared-absorbing film or panel having good color tone while the near-infrared-absorbing dye disposed therein is kept stable, the dye and the binder resin for the dye are specifically selected, and the production method is also specifically selected. In addition, for the purpose of producing the film or panel while the dye disposed therein is kept stable and for the purpose of making the film or panel have additional functions such as electromagnetic radiation absorbability, the film or panel is made to have a multi-layered structure.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: July 3, 2001
    Assignee: Kanebo, Ltd.
    Inventors: Kenji Yao, Masahiro Koike, Yasuko Suzuki, Kazuo Sakurai, Takashi Indo, Kouei Igarashi
  • Patent number: 6240784
    Abstract: A stress evaluation method for evaluating stress acting on a test piece includes the steps of transmitting acoustic waves including a surface wave, a longitudinal wave, and a shear wave through the test piece; receiving the acoustic waves after they have propagated through the test piece; obtaining acoustic velocities of the surface wave at a non-loaded portion and a loaded portion of the test piece based on the received acoustic waves; evaluating a stress in a surface layer of the test piece based on a difference between the surface wave acoustic velocities at the non-loaded portion and the loaded portion and a predetermined relationship between surface wave acoustic velocities and stresses; obtaining an acoustic velocity of the longitudinal wave at the non-loaded portion based on the received acoustic waves; calculating an acoustic velocity of the shear wave at the loaded portion based on the received acoustic waves and the longitudinal wave acoustic velocity at the non-loaded portion; evaluating an interna
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: June 5, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Koike, Fuminobu Takahashi, Hideki Inoue, Yosinori Musha, Shuuji Kamimoto, Shinji Naito, Tsukasa Sasaki
  • Patent number: 6060403
    Abstract: A method of manufacturing a semiconductor device comprises the step of applying a nitridation treatment to a semiconductor substrate in the presence of a network terminal element so as to form a nitride film containing the network terminal element on the semiconductor substrate.
    Type: Grant
    Filed: September 16, 1998
    Date of Patent: May 9, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoki Yasuda, Masahiro Koike, Kouichi Muraoka, Hideki Satake
  • Patent number: 5886198
    Abstract: Cyclic formal is manufactured by cyclic reaction of an alkylene glycol and an aldehyde in a reactor, producing formal mixed with unreacted aldehyde as an impurity, which impurity is reduced in amount by connecting the reactor to a distillation tower and continuously supplying alkylene glycol to the distillation tower from which unreacted formaldehyde and a cyclic formal are being distilled, and continuously reacting them with supplied raw formaldehyde by countercurrent flow during distillation; water content in azeotropic admixture with cyclic formal can be removed by azeotropic distillation with a hydrocarbon azeotropic mixture with water, distilling water from the cyclic formal.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: March 23, 1999
    Assignee: Toray Industries, Inc.
    Inventors: Daisuke Ogawa, Masahiro Koike, Yoshiyuki Yamamoto