Abstract: A stereoscopic endoscope system includes: a corresponding point detection section that detects a position of an object in each of an image for the right eye and an image for the left eye based on right and left video signals; a horizontal position moving section that moves, based on a parallax between the image for the right eye and the image for the left eye and depth information of a stereoscopic video which are obtained from the detected positions, horizontal positions of the right and left video signals, by an amount of the parallax, respectively in directions determined according to the depth information; a vertical/horizontal inversion section that vertically and horizontally inverts the right and left video signals whose horizontal positions have been moved; and a stereoscopic signal combining section that combines the right and left video signals subjected to the vertical/horizontal inversion, and generates a stereoscopic video signal.

Abstract: A monitor apparatus includes: a display panel that displays a medical image; an as-viewed output terminal capable of outputting a video signal reflecting a same color set value as a color set value reflected in the medical image displayed on the display panel; a communication unit that detects device information regarding an external device connected to the as-viewed output terminal; and a second color setting reflection unit capable of controlling to further change the color set value reflected in the video signal outputted from the as-viewed output terminal based on a detection result of the communication unit.

Abstract: A receiver circuit includes: a plurality of first holding circuits respectively latching a plurality of reception data pieces on the basis of a same clock signal; a comparison circuit respectively comparing first reception data pieces and second reception data pieces after a certain time elapses since the latch of the plurality of first holding circuits, the first reception date pieces being respectively latched by the plurality of first holding circuits, the second reception data pieces being respectively input to the plurality of first holding circuits; and a plurality of second holding circuits respectively latching the first reception data pieces when a first output signal of the comparison circuit indicates that the first reception data pieces and the second reception data pieces are identical.

Abstract: A signal generation circuit includes a limiter and a mixer. The limiter receives an input signal, allows the input signal to be off a scale at a limit voltage, and generates a phase signal indicating a phase component of the input signal. The mixer receives the input signal and the phase signal, and generates an amplitude signal indicating an amplitude component of the input signal.

Abstract: A stereoscopic endoscope system includes: a corresponding point detection section that detects a position of an object in each of an image for the right eye and an image for the left eye based on right and left video signals; a horizontal position moving section that moves, based on a parallax between the image for the right eye and the image for the left eye and depth information of a stereoscopic video which are obtained from the detected positions, horizontal positions of the right and left video signals, by an amount of the parallax, respectively in directions determined according to the depth information; a vertical/horizontal inversion section that vertically and horizontally inverts the right and left video signals whose horizontal positions have been moved; and a stereoscopic signal combining section that combines the right and left video signals subjected to the vertical/horizontal inversion, and generates a stereoscopic video signal.

Abstract: A signal generation circuit includes a limiter and a mixer. The limiter receives an input signal, allows the input signal to be off a scale at a limit voltage, and generates a phase signal indicating a phase component of the input signal. The mixer receives the input signal and the phase signal, and generates an amplitude signal indicating an amplitude component of the input signal.

Abstract: An amplifier circuit includes an amplifier unit and a current control circuit as means for achieving the aforementioned object. The amplifier unit includes a gain compensation MOS transistor compensating for gain of an output characteristic and a linearity compensation MOS transistor compensating for linearity of an output characteristic. A source of the gain compensation MOS transistor is connected to a drain of the linearity compensation MOS transistor. An input signal is applied to a gate of the linearity compensation MOS transistor. A drain of the gain compensation MOS transistor is set as an output. The current control circuit performs control so as to pass predetermined current between the drain and the source of the gain compensation MOS transistor and pass predetermined current between the drain and the source of the linearity compensation MOS transistor.

Abstract: A signal processing apparatus includes a first filter on an in-phase signal channel; a second filter on a quadrature signal channel; a plurality of filter stages having each of more than one signal paths crossing each other which connects the first filter and the second filter; and at least more than one of the filter stages of more than one of a plurality of the filter stages includes a switching circuit disconnecting more than one of the signal paths and a correction unit correcting direct current offsets of the first filter and the second filter by using the switching circuit.

Abstract: A signal processing apparatus includes a first filter on an in-phase signal channel; a second filter on a quadrature signal channel; a plurality of filter stages having each of more than one signal paths crossing each other which connects the first filter and the second filter; and at least more than one of the filter stages of more than one of a plurality of the filter stages includes a switching circuit disconnecting more than one of the signal paths and a correction unit correcting direct current offsets of the first filter and the second filter by using the switching circuit.

Abstract: A stereoscopic observation system includes a stereoscopic image pick up apparatus to pick up left and right images at an inward angle, a stereoscopic image display apparatus to transmit the left and right images picked up by the stereoscopic image pick up apparatus to an observer so that the images are stereoscopically observed at a convergence angle, a convergence angle change portion provided in the stereoscopic image display apparatus and to change the convergence angle, a recognition portion to recognize the stereoscopic image pick up apparatus, and a control portion to control the convergence angle change portion on the basis of the result of the recognition in the recognition portion so that the convergence angle is substantially equal to the inward angle.

Abstract: In a cascode current-mirror circuit which reproduces a reference current generated by a current source and outputs the reproduced reference current: the control electrodes of first and second transistors are connected; a third transistor is cascode-connected to the first transistor through a current electrode; a fourth transistor is cascode-connected to the second transistor; the control electrodes of the third and fourth transistors are connected; the control electrode of a fifth transistor is connected to the control electrode of the first transistor and another current electrode of the third transistor, and is to be connected to the current source; and a bias-voltage generation circuit generates bias voltages for the third and fourth transistors on the basis of voltages of the control electrodes of the first and the fifth transistors.

Abstract: A bias circuit for applying a bias voltage to a nonlinear amplification circuit, including a constant-current source; and a first, second, third, and fourth transistors, wherein a current mirror circuit is configured by the first transistor and the second transistor, and the bias voltage is outputted from the drain of the second transistor, gate lengths and gate widths of the first and second transistor are the same, gate lengths of the first to fourth transistor are the same, and gate lengths and gate widths of the first, second, third, and fourth transistor are configured so that k4?0.5?k3?0.5 is approximately 1, where k3 stands for a ratio of a gate width of the third transistor to the gate width of the first transistor and k4 stands for a ratio of a gate width of the fourth transistor to the gate width of the first transistor.

Abstract: A control circuit U1 comprises four PMOS transistors MP1-MP4 and receives a voltage Vn and a voltage Vss. MP1 and MP3, and, MP2 and MP4 are respectively connected in series between power supply Vdd and a fixed voltage Vss. Gate terminal of MP2 is connected to Vss. Reference current and its copy current F1 respectively flow through NMOS transistors M1 and M2, of which respective source terminals are connected to Vss. Gate width of M2 is a quarter of that of M1. Drain terminal is connected to the gate terminals of MP1 and MP2. Node between source terminal of MP2 and drain terminal of MP3 is connected to gate terminal of MP1, and node between source terminal of MP2 and drain terminal of MP4 is connected to gate terminal of MP2. The control circuit U1 controls gate terminal voltage of M1 to make an overdrive voltage of M1 becomes Vn.

Abstract: A differential current mirror circuit includes: a first branching unit that branches current through a first current input terminal to a first current path and a second current path; a second branching unit that branches current through a second current input terminal to a third current path and a fourth current path; and a current mirror that copies current. The current copied by the current mirror is a combination of the current flowing through the second current path and the fourth current path and removal of the in-phase component from current through the first current path enables only the differential component flowing through the first current path to flow to a first current output terminal. Similarly, the in-phase component from current through the third current path is removed, enabling only the differential component flowing through the third current path to flow to a second current output terminal.

Abstract: An analog switch comprises a first transistor, a second transistor, the drain and the source thereof being connected between said first input terminal and a second output terminal whereto said second signal is output and the gate thereof being grounded or connected to a supply voltage node, a third transistor, the drain and the source thereof being connected between a second input terminal whereto said second signal is input and said second output terminal and said third transistor being turned on and off by a control signal provided to the gate thereof; and a fourth transistor, the drain and the source thereof being connected between said second input terminal and said first output terminal and the gate thereof being grounded or connected to a supply voltage node.

Abstract: A semiconductor circuit including a bias circuit (1) generating a signal reflecting a current driving capability of a transistor; an analog/digital converter circuit (2) converting the signal from an analog format into a digital format; and a signal processing circuit (3) partially controlled in an operating state or a non-operating state according to the signal converted by the analog/digital converter circuit as a control signal, is provided.

Abstract: The first and second time-domain signals are received, and a difference between the pulse width of the first time-domain signal and the pulse width of the second time-domain signal within a unit time for carrying one item of analog signal information is obtained. The obtained difference is treated as positive information if the pulse width of the first time-domain signal is greater than the pulse width of the second time-domain signal, or as negative information if the pulse width of the first time-domain signal is smaller than the pulse width of the second time-domain signal.

Abstract: A bias circuit for applying a bias voltage to a nonlinear amplification circuit, including a constant-current source; and a first, second, third, and fourth transistors, wherein a current mirror circuit is configured by the first transistor and the second transistor, and the bias voltage is outputted from the drain of the second transistor, gate lengths and gate widths of the first and second transistor are the same, gate lengths of the first to fourth transistor are the same, and gate lengths and gate widths of the first, second, third, and fourth transistor are configured so that k4?0.5?k3?0.5 is approximately 1, where k3 stands for a ratio of a gate width of the third transistor to the gate width of the first transistor and k4 stands for a ratio of a gate width of the fourth transistor to the gate width of the first transistor.

Abstract: In a cascode current-mirror circuit which reproduces a reference current generated by a current source and outputs the reproduced reference current: the control electrodes of first and second transistors are connected; a third transistor is cascode-connected to the first transistor through a current electrode; a fourth transistor is cascode-connected to the second transistor; the control electrodes of the third and fourth transistors are connected; the control electrode of a fifth transistor is connected to the control electrode of the first transistor and another current electrode of the third transistor, and is to be connected to the current source; and a bias-voltage generation circuit generates bias voltages for the third and fourth transistors on the basis of voltages of the control electrodes of the first and the fifth transistors.

Abstract: The present invention provides a system including a stereoscopic endoscope having left and right image pickup units for picking up parallactic images of an object through objective lenses laterally arranged at a distance from each other and CCDs laterally arranged at a distance from each other. In the stereoscopic endoscope, the focal distance is variable by moving focusing lenses. A display control unit is constructed so as to mask image pickup areas in left and right images display in left and right display elements on the basis of information regarding the distance to an object, the image pickup areas being picked up-only by one of the left and right image pickup units. Thus, images corresponding to an area that is picked up in common by both the left and right image pickup units are displayed.