Patents by Inventor Masahiro Kurimoto

Masahiro Kurimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11976583
    Abstract: The present invention relates to a reservoir tank for coolant that stores the coolant for cooling an internal combustion engine. The reservoir tank includes: a tank chamber that stores the coolant; an opening, which is disposed in an upper part of the tank chamber, through which the coolant flows in and flows out, and in a circumferential wall of which a breathing hole is formed; and a first communication passage, a second communication passage, and a third communication passage that respectively communicate with the opening and the tank chamber.
    Type: Grant
    Filed: August 29, 2023
    Date of Patent: May 7, 2024
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Miyo Kitamura, Shinji Shimoyama, Keijiro Koide, Masahiro Kato, Tatsuya Kurimoto, Tatsuki Tanaka, Koji Sato, Takumi Tokinoya
  • Publication number: 20240077015
    Abstract: The present invention relates to a reservoir tank for coolant that stores the coolant for cooling an internal combustion engine. The reservoir tank includes: a tank chamber that stores the coolant; an opening, which is disposed in an upper part of the tank chamber, through which the coolant flows in and flows out, and in a circumferential wall of which a breathing hole is formed; and a first communication passage, a second communication passage, and a third communication passage that respectively communicate with the opening and the tank chamber.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 7, 2024
    Inventors: Miyo KITAMURA, Shinji SHIMOYAMA, Keijiro KOIDE, Masahiro KATO, Tatsuya KURIMOTO, Tatsuki TANAKA, Koji SATO, Takumi TOKINOYA
  • Patent number: 7086022
    Abstract: A hard macro cell which prevents signal delay and quality deterioration of signal waveforms without requiring excessively long wires, and a semiconductor integrated circuit using the hard macro cell. The semiconductor integrated circuit includes the hard macro cell and other hard macro cells, which are functional blocks for performing predetermined functions. The hard macro cell is provided with input/output terminals for connecting the hard macro cell with the other hard macro cells, a repeater for overcoming signal delay and for improving the quality of signal waveforms, and an input terminal and an output terminal for connecting global wires which connect the other hard macro cells to the repeater. Signals outputted from an output terminal of one of the other hard macro cells are inputted to an input terminal of another of the other hard macro cells via the global wires and the repeater.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: August 1, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Masahiro Kurimoto
  • Publication number: 20030116787
    Abstract: A hard macro cell which prevents signal delay and quality deterioration of signal waveforms without requiring excessively long wires, and a semiconductor integrated circuit using the hard macro cell. The semiconductor integrated circuit includes the hard macro cell and other hard macro cells, which are functional blocks for performing predetermined functions. The hard macro cell is provided with input/output terminals for connecting the hard macro cell with the other hard macro cells, a repeater for overcoming signal delay and for improving the quality of signal waveforms, and an input terminal and an output terminal for connecting global wires which connect the other hard macro cells to the repeater. Signals outputted from an output terminal of one of the other hard macro cells are inputted to an input terminal of another of the other hard macro cells via the global wires and the repeater.
    Type: Application
    Filed: September 19, 2002
    Publication date: June 26, 2003
    Inventor: Masahiro Kurimoto
  • Patent number: 5338986
    Abstract: A CMOS output circuit including a pMOS transistor and an nMOS transistor connected in series between a power supply voltage and a ground voltage, is formed with a resistive component for reducing occurrence of latch-up. The resistive component is arranged at least one of the sources of the pMOS and nMOS transistors so as to be connected in series with a parasitic bipolar transistor formed between the power supply voltage and the ground voltage through its emitter. The resistive component limits the collector current of the parasitic bipolar transistor at a time that a triggering voltage is applied to an output terminal of the output circuit, so that the parasitic bipolar transistor does not turn on readily, thereby resulting in reduced possibility of occurrence of latch-up.
    Type: Grant
    Filed: May 18, 1993
    Date of Patent: August 16, 1994
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Masahiro Kurimoto
  • Patent number: 4621436
    Abstract: A position detecting apparatus for generating a position detection signal when the sensor comes into contact with a workpiece is equipped with a swivel mechanism which allows the sensor to move in any direction within a constant range at the time of contact. This swivel mechanism comprises a metal cylinder for supporting the sensor, a mechanism for moving in the vertical direction guided by a center shaft supported by a swivel bearing, and a mechanism for moving the metal cylinder and center shaft in the horizontal direction. When the sensor contacts the workpiece, a display, for example, is lit up by a position detection circuit.
    Type: Grant
    Filed: June 18, 1985
    Date of Patent: November 11, 1986
    Assignee: Sokkisha Co., Ltd.
    Inventor: Masahiro Kurimoto