Patents by Inventor Masahiro Kuriyama

Masahiro Kuriyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7573109
    Abstract: A semiconductor device having high withstand strength against destruction. The semiconductor device 1 includes guard buried regions 44b of second conductivity type concentrically provided on a resistance layer 15 of first conductivity type and base diffusion regions 17a are provided inside of the guard buried region 44b and base buried regions 44a of the second conductivity type are provided on the bottom surface of the base diffusion regions 17a. A distance between adjacent base buried regions 44a at the bottom of the same base diffusion region 17a is Wm1, a distance between adjacent base buried regions 44a at the bottom of the different base diffusion regions 17a is Wm2, and a distance between the guard buried regions 44b is WPE. A ratio of an impurity quantity Q1 of the first conductivity type and an impurity quantity Q2 of the second conductivity type included inside the widthwise center of the innermost guard buried region 44b is 0.90<Q2/Q1 when Wm1<WPE<Wm2.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: August 11, 2009
    Assignee: Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Shinji Kunori, Hiroaki Shishido, Masato Mikawa, Kosuke Ohshima, Masahiro Kuriyama, Mizue Kitada
  • Patent number: 7282764
    Abstract: A semiconductor device having high ruggedness is provided. The distance Wm2 between buried regions, positioned at the bottoms of different base diffusion regions and face each other, is set smaller than the distance Wm1 between buried regions positioned at the bottom of the same base diffusion region (Wm1>Wm2). An avalanche breakdown occurs under the bottom of the base diffusion region, and the avalanche current is not passed through a high resistance part immediately under the source diffusion region in the base diffusion region, thereby providing high withstand strength against destruction.
    Type: Grant
    Filed: July 6, 2006
    Date of Patent: October 16, 2007
    Assignee: Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Shinji Kunori, Hiroaki Shishido, Masato Mikawa, Kosuke Ohshima, Masahiro Kuriyama, Mizue Kitada
  • Publication number: 20070069323
    Abstract: A semiconductor device having high withstand strength against destruction. The semiconductor device 1 includes guard buried regions 44b of second conductivity type concentrically provided on a resistance layer 15 of first conductivity type and base diffusion regions 17a are provided inside of the guard buried region 44b and base buried regions 44a of the second conductivity type are provided on the bottom surface of the base diffusion regions 17a. A distance between adjacent base buried regions 44a at the bottom of the same base diffusion region 17a is Wm1, a distance between adjacent base buried regions 44a at the bottom of the different base diffusion regions 17a is Wm2, and a distance between the guard buried regions 44b is WPE. A ratio of an impurity quantity Q1 of the first conductivity type and an impurity quantity Q2 of the second conductivity type included inside the widthwise center of the innermost guard buried region 44b is 0.90<Q2/Q1 when Wm1<WPE<Wm2.
    Type: Application
    Filed: September 28, 2006
    Publication date: March 29, 2007
    Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Shinji Kunori, Hiroaki Shishido, Masato Mikawa, Kosuke Ohshima, Masahiro Kuriyama, Mizue Kitada
  • Publication number: 20070045776
    Abstract: A semiconductor device having high ruggedness is provided. The distance Wm2 between buried regions, positioned at the bottoms of different base diffusion regions and face each other, is set smaller than the distance Wm1 between buried regions positioned at the bottom of the same base diffusion region (Wm1>Wm2). An avalanche breakdown occurs under the bottom of the base diffusion region, and the avalanche current is not passed through a high resistance part immediately under the source diffusion region in the base diffusion region, thereby providing high withstand strength against destruction.
    Type: Application
    Filed: July 6, 2006
    Publication date: March 1, 2007
    Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Shinji Kunori, Hiroaki Shishido, Masato Mikawa, Kosuke Ohshima, Masahiro Kuriyama, Mizue Kitada