Patents by Inventor Masahiro Maki
Masahiro Maki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240139719Abstract: A catalyst for methane synthesis is made up from layered double hydroxides represented by the following general formula (1). [M2+1-xM3+x(OH)2]x+[An?x/n·yH2O]??(1) In formula (1), M2+ is Ni2+ and M3+ is Al3+ or Cr3+. Further, An? is CO32?. Furthermore, the term x lies within a range of 0.19 to 0.34 (0.19?x?0.34), and y is 0 or a positive integer.Type: ApplicationFiled: October 23, 2023Publication date: May 2, 2024Inventors: Hideaki YONEDA, Kazuki YANAGISAWA, Misato MAKI, Masahiro MOHRI, Jumpei YOSHIDA, Noritatsu TSUBAKI
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Publication number: 20240141525Abstract: An electrosynthesis system is equipped with an electrolysis device that carries out electrolysis on carbon dioxide gas and water vapor, a synthesizing device that synthesizes a hydrocarbon gas from hydrogen gas and carbon monoxide gas that are generated by the electrolysis, and a control device. The control device adjusts a flow rate of the water vapor supplied to the electrolysis device, in a manner so that a first concentration ratio, which is a concentration ratio between the hydrogen gas and the carbon monoxide gas in a mixed gas discharged from the electrolysis device and containing the hydrogen gas and the carbon monoxide gas, becomes a predetermined target concentration ratio.Type: ApplicationFiled: October 26, 2023Publication date: May 2, 2024Inventors: Masahiro MOHRI, Kazuki YANAGISAWA, Misato MAKI, Hideaki YONEDA, Jumpei YOSHIDA
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Publication number: 20240091842Abstract: A plated steel sheet for hot stamping according to one aspect of the present invention includes a steel sheet, a plating layer formed on either surface or both surfaces of the steel sheet and having an Al content of 60 mass % or more, and a surface film layer formed on the plating layer. A thickness t of the plating layer is 10 to 60 ?m. An average crystal grain diameter of the plating layer in a thickness range from an interface between the plating layer and the surface film layer to a position at ? of the thickness t is 2t/3 or less and 15.0 ?m or less. A surface film layer contains particles containing one or more elements selected from A group elements consisting of Sc, V, Mn, Fe, Co, Ce, Nb, Mo, and W. A total content of the A group elements is 0.01 to 10.0 g/m2. An average grain diameter of the particles containing the A group elements is 0.05 to 3.0 ?m.Type: ApplicationFiled: November 29, 2019Publication date: March 21, 2024Applicant: NIPPON STEEL CORPORATIONInventors: Yuki SUZUKI, Soshi FUJITA, Jun MAKI, Kazuhisa KUSUMI, Masahiro FUDA
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Patent number: 10838533Abstract: The presence or absence of touch is detected according to a difference of a capacitance caused by the presence or absence of a material that blocks the electric field formed between the detection electrode and the common electrode. The common electrode includes a plurality of divided electrode portions that is extended in a lateral direction and aligned with each other in a longitudinal direction. Each of the plurality of common lines is electrically connected to at least one of the divided electrode portions. The plurality of common lines is arranged in an area next to the common electrode in the lateral direction of the common electrode, arranged next to each other in a width direction orthogonal to a length thereof, is different in width from each other, and the width of the common lines is wider as the length is longer.Type: GrantFiled: January 27, 2020Date of Patent: November 17, 2020Assignee: Japan Display Inc.Inventors: Hiroyuki Abe, Masahiro Maki, Takayuki Suzuki
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Publication number: 20200159357Abstract: The presence or absence of touch is detected according to a difference of a capacitance caused by the presence or absence of a material that blocks the electric field formed between the detection electrode and the common electrode. The common electrode includes a plurality of divided electrode portions that is extended in a lateral direction and aligned with each other in a longitudinal direction. Each of the plurality of common lines is electrically connected to at least one of the divided electrode portions. The plurality of common lines is arranged in an area next to the common electrode in the lateral direction of the common electrode, arranged next to each other in a width direction orthogonal to a length thereof, is different in width from each other, and the width of the common lines is wider as the length is longer.Type: ApplicationFiled: January 27, 2020Publication date: May 21, 2020Inventors: Hiroyuki ABE, Masahiro MAKI, Takayuki SUZUKI
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Patent number: 10643563Abstract: A driving circuit of a display device includes first to third output signal lines which are continuously arranged, a first transistor that has a source connected to the second output signal line and a drain connected to a first clock signal line, and a second transistor that provides a non-active potential to a gate of the first transistor when a second clock signal becomes the active potential, wherein a circuit that outputs the active potential to the first output signal line and the third output signal line is disposed at an opposite side to a circuit that outputs the active potential to the second output signal line with a display region interposed therebetween, and wherein the gate of the first transistor is connected to the first output signal line and the third output signal line via rectifying circuits.Type: GrantFiled: October 26, 2018Date of Patent: May 5, 2020Assignee: Japan Display Inc.Inventors: Hiroyuki Abe, Masahiro Maki, Hiroaki Komatsu
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Patent number: 10593276Abstract: A display device includes pixel electrodes formed in an image display area of a substrate, a common electrode formed in the image display area, inside signal lines formed inside the image display area, and electrically connected to the pixel electrodes, outside signal lines formed outside the image display area, and electrically connected to the inside signal lines, and a common line formed inside and outside the image display area, and electrically connected to the common electrode. An image is displayed under a control of a light using an electric field developed between the pixel electrodes and the common electrode. A coupling capacitance is formed between the inside signal lines and the common electrode. The outside signal lines each include a first portion, and a second portion higher in electric resistance than the first portion and the inside signal lines.Type: GrantFiled: October 16, 2018Date of Patent: March 17, 2020Assignee: Japan Display Inc.Inventors: Takayuki Suzuki, Hiroyuki Abe, Masahiro Maki, Mitsuru Goto
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Patent number: 10585517Abstract: The presence or absence of touch is detected according to a difference of a capacitance caused by the presence or absence of a material that blocks the electric field formed between the detection electrode and the common electrode. The common electrode includes a plurality of divided electrode portions that is extended in a lateral direction and aligned with each other in a longitudinal direction. Each of the plurality of common lines is electrically connected to at least one of the divided electrode portions. The plurality of common lines is arranged in an area next to the common electrode in the lateral direction of the common electrode, arranged next to each other in a width direction orthogonal to a length thereof, is different in width from each other, and the width of the common lines is wider as the length is longer.Type: GrantFiled: June 11, 2019Date of Patent: March 10, 2020Assignee: Japan Display Inc.Inventors: Hiroyuki Abe, Masahiro Maki, Takayuki Suzuki
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Patent number: 10453416Abstract: A display driving circuit having a shift register is formed on the display panel. The shift register includes a first stage having first and second transistors and a second stage having a third and fourth transistor. A voltage of a control electrode of the first transistor is boosted by a voltage of a first pulse line changing from low to high. In an On state, the second transistor connects the control electrode of the first transistor and a constant voltage line. A voltage of a control electrode of the third transistor is boosted by a voltage of a second pulse line changing from low to high. In an On state, the fourth transistor connects the control electrode of the third transistor and a constant voltage line. The fourth transistor is switched on by a signal from the first stage.Type: GrantFiled: January 22, 2019Date of Patent: October 22, 2019Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Toshio Miyazawa, Iwao Takemoto, Atsushi Hasegawa, Masahiro Maki, Kazutaka Goto
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Publication number: 20190294285Abstract: The presence or absence of touch is detected according to a difference of a capacitance caused by the presence or absence of a material that blocks the electric field formed between the detection electrode and the common electrode. The common electrode includes a plurality of divided electrode portions that is extended in a lateral direction and aligned with each other in a longitudinal direction. Each of the plurality of common lines is electrically connected to at least one of the divided electrode portions. The plurality of common lines is arranged in an area next to the common electrode in the lateral direction of the common electrode, arranged next to each other in a width direction orthogonal to a length thereof, is different in width from each other, and the width of the common lines is wider as the length is longer.Type: ApplicationFiled: June 11, 2019Publication date: September 26, 2019Inventors: Hiroyuki Abe, Masahiro Maki, Takayuki Suzuki
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Patent number: 10395617Abstract: A gate signal line driving circuit includes plural basic circuits, each outputting to a gate signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: agate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period to apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.Type: GrantFiled: December 19, 2018Date of Patent: August 27, 2019Assignee: Japan Display Inc.Inventors: Hiroyuki Abe, Masahiro Maki, Hideo Sato, Hiroaki Komatsu
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Patent number: 10359875Abstract: The presence or absence of touch is detected according to a difference of a capacitance caused by the presence or absence of a material that blocks the electric field formed between the detection electrode and the common electrode. The common electrode includes a plurality of divided electrode portions that is extended in a lateral direction and aligned with each other in a longitudinal direction. Each of the plurality of common lines is electrically connected to at least one of the divided electrode portions. The plurality of common lines is arranged in an area next to the common electrode in the lateral direction of the common electrode, arranged next to each other in a width direction orthogonal to a length thereof, is different in width from each other, and the width of the common lines is wider as the length is longer.Type: GrantFiled: February 14, 2018Date of Patent: July 23, 2019Assignee: Japan Display Inc.Inventors: Hiroyuki Abe, Masahiro Maki, Takayuki Suzuki
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Publication number: 20190156780Abstract: A display driving circuit having a shift register is formed on the display panel. The shift register includes a first stage having first and second transistors and a second stage having a third and fourth transistor. A voltage of a control electrode of the first transistor is boosted by a voltage of a first pulse line changing from low to high. In an On state, the second transistor connects the control electrode of the first transistor and a constant voltage line. A voltage of a control electrode of the third transistor is boosted by a voltage of a second pulse line changing from low to high. In an On state, the fourth transistor connects the control electrode of the third transistor and a constant voltage line. The fourth transistor is switched on by a signal from the first stage.Type: ApplicationFiled: January 22, 2019Publication date: May 23, 2019Inventors: Toshio MIYAZAWA, Iwao TAKEMOTO, Atsushi HASEGAWA, Masahiro MAKI, Kazutaka GOTO
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Publication number: 20190122629Abstract: A gate signal line driving circuit includes plural basic circuits, each outputting to a gate signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: agate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period to apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.Type: ApplicationFiled: December 19, 2018Publication date: April 25, 2019Inventors: Hiroyuki ABE, Masahiro MAKI, Hideo SATO, Hiroaki KOMATSU
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Publication number: 20190088225Abstract: A display device includes pixel electrodes formed in an image display area of a substrate, a common electrode formed in the image display area, inside signal lines formed inside the image display area, and electrically connected to the pixel electrodes, outside signal lines formed outside the image display area, and electrically connected to the inside signal lines, and a common line formed inside and outside the image display area, and electrically connected to the common electrode. An image is displayed under a control of a light using an electric field developed between the pixel electrodes and the common electrode. A coupling capacitance is formed between the inside signal lines and the common electrode. The outside signal lines each include a first portion, and a second portion higher in electric resistance than the first portion and the inside signal lines.Type: ApplicationFiled: October 16, 2018Publication date: March 21, 2019Inventors: Takayuki SUZUKI, Hiroyuki ABE, Masahiro Maki, Mitsuru Goto
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Patent number: 10223994Abstract: A display driving circuit having a shift register is formed on the display panel. The shift register includes a first stage having first and second transistors and a second stage having a third and fourth transistor. A voltage of a control electrode of the first transistor is boosted by a voltage of a first pulse line changing from low to high. In an On state, the second transistor connects the control electrode of the first transistor and a constant voltage line. A voltage of a control electrode of the third transistor is boosted by a voltage of a second pulse line changing from low to high. In an On state, the fourth transistor connects the control electrode of the third transistor and a constant voltage line. The fourth transistor is switched on by a signal from the first stage.Type: GrantFiled: January 4, 2018Date of Patent: March 5, 2019Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Toshio Miyazawa, Iwao Takemoto, Atsushi Hasegawa, Masahiro Maki, Kazutaka Goto
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Publication number: 20190066618Abstract: A driving circuit of a display device includes first to third output signal lines which are continuously arranged, a first transistor that has a source connected to the second output signal line and a drain connected to a first clock signal line, and a second transistor that provides a non-active potential to a gate of the first transistor when a second clock signal becomes the active potential, wherein a circuit that outputs the active potential to the first output signal line and the third output signal line is disposed at an opposite side to a circuit that outputs the active potential to the second output signal line with a display region interposed therebetween, and wherein the gate of the first transistor is connected to the first output signal line and the third output signal line via rectifying circuits.Type: ApplicationFiled: October 26, 2018Publication date: February 28, 2019Inventors: Hiroyuki Abe, Masahiro Maki, Hiroaki Komatsu
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Patent number: 10199004Abstract: A gate signal line driving circuit includes plural basic circuits, each outputting to a gate signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: a gate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period to apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.Type: GrantFiled: August 21, 2018Date of Patent: February 5, 2019Assignee: Japan Display Inc.Inventors: Hiroyuki Abe, Masahiro Maki, Hideo Sato, Hiroaki Komatsu
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Publication number: 20180374444Abstract: A gate signal line driving circuit includes plural basic circuits, each outputting to a gats signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: agate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period to apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.Type: ApplicationFiled: August 21, 2018Publication date: December 27, 2018Inventors: Hiroyuki ABE, Masahiro MAKI, Hideo SATO, Hiroaki KOMATSU
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Patent number: 10147377Abstract: A driving circuit of a display device includes first to third output signal lines which are continuously arranged, a first transistor that has a source connected to the second output signal line and a drain connected to a first clock signal line, and a second transistor that provides a non-active potential to a gate of the first transistor when a second clock signal becomes the active potential, wherein a circuit that outputs the active potential to the first output signal line and the third output signal line is disposed at an opposite side to a circuit that outputs the active potential to the second output signal line with a display region interposed therebetween, and wherein the gate of the first transistor is connected to the first output signal line and the third output signal line via rectifying circuits.Type: GrantFiled: November 9, 2017Date of Patent: December 4, 2018Assignee: Japan Display Inc.Inventors: Hiroyuki Abe, Masahiro Maki, Hiroaki Komatsu