Patents by Inventor Masahiro Minegishi

Masahiro Minegishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9507479
    Abstract: A display device with a touch detection function includes a display function layer, a plurality of touch detection electrodes arranged side by side to extend in a first direction, and a plurality of drive electrodes arranged side by side to extend in a second direction, electrostatic capacitance being formed at intersections of the touch detection electrodes and the drive electrodes. The plurality of drive electrodes extends to a first position or a second position outside of the first position, the first position being away from a center of an outermost touch detection electrode by a half length of an arrangement pitch of the touch detection electrodes, the outermost touch detection electrode being defined as outermost one of touch detection electrodes included in an effective display region of the display function layer, and an outer edge of the effective display region is located on or inside the first position.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: November 29, 2016
    Assignee: Japan Display Inc.
    Inventors: Yuichiro Minami, Masahiro Minegishi, Koji Noguchi, Koji Ishizaki, Yoshitoshi Kida, Kohei Azumi
  • Publication number: 20150199057
    Abstract: A display device with a touch detection function includes a display function layer, a plurality of touch detection electrodes arranged side by side to extend in a first direction, and a plurality of drive electrodes arranged side by side to extend in a second direction, electrostatic capacitance being formed at intersections of the touch detection electrodes and the drive electrodes. The plurality of drive electrodes extends to a first position or a second position outside of the first position, the first position being away from a center of an outermost touch detection electrode by a half length of an arrangement pitch of the touch detection electrodes, the outermost touch detection electrode being defined as outermost one of touch detection electrodes included in an effective display region of the display function layer, and an outer edge of the effective display region is located on or inside the first position.
    Type: Application
    Filed: March 25, 2015
    Publication date: July 16, 2015
    Inventors: Yuichiro Minami, Masahiro Minegishi, Koji Noguchi, Koji Ishizaki, Yoshitoshi Kida, Kohei Azumi
  • Patent number: 9019231
    Abstract: A display device with a touch detection function includes a display function layer, a plurality of touch detection electrodes arranged side by side to extend in a first direction, and a plurality of drive electrodes arranged side by side to extend in a second direction, electrostatic capacitance being formed at intersections of the touch detection electrodes and the drive electrodes. The plurality of drive electrodes extends to a first position or a second position outside of the first position, the first position being away from a center of an outermost touch detection electrode by a half length of an arrangement pitch of the touch detection electrodes, the outermost touch detection electrode being defined as outermost one of touch detection electrodes included in an effective display region of the display function layer, and an outer edge of the effective display region is located on or inside the first position.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: April 28, 2015
    Assignee: Japan Display Inc.
    Inventors: Yuichiro Minami, Masahiro Minegishi, Koji Noguchi, Koji Ishizaki, Yoshitoshi Kida, Kohei Azumi
  • Publication number: 20120075238
    Abstract: A display device with a touch detection function includes a display function layer, a plurality of touch detection electrodes arranged side by side to extend in a first direction, and a plurality of drive electrodes arranged side by side to extend in a second direction, electrostatic capacitance being formed at intersections of the touch detection electrodes and the drive electrodes. The plurality of drive electrodes extends to a first position or a second position outside of the first position, the first position being away from a center of an outermost touch detection electrode by a half length of an arrangement pitch of the touch detection electrodes, the outermost touch detection electrode being defined as outermost one of touch detection electrodes included in an effective display region of the display function layer, and an outer edge of the effective display region is located on or inside the first position.
    Type: Application
    Filed: August 8, 2011
    Publication date: March 29, 2012
    Applicant: Sony Corporation
    Inventors: Yuichiro Minami, Masahiro Minegishi, Koji Noguchi, Koji Ishizaki, Yoshitoshi Kida, Kohei Azumi
  • Patent number: 7033872
    Abstract: A thin film transistor which can be used in an LCD display panel includes an insulator substrate, a gate electrode located on the insulator substrate, an insulator film provided on the insulator substrate and the gate electrode, and a polycrystalline silicon film located on the insulator film. A channel is defined in a first portion of the polycrystalline silicon film over the gate electrode, and a drain and a source are defined in second and third portions of the polycrystalline silicon film over the insulator substrate. Grain sizes of the drain and source are equal to or greater than a grain size of the channel.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: April 25, 2006
    Assignees: Sanyo Electric., Ltd., Sony Corporation
    Inventors: Yushi Jinno, Ken Wakita, Masahiro Minegishi
  • Publication number: 20040241925
    Abstract: A thin film transistor which can be used in an LCD display panel includes an insulator substrate, a gate electrode located on the insulator substrate, an insulator film provided on the insulator substrate and the gate electrode, and a polycrystalline silicon film located on the insulator film. A channel is defined in a first portion of the polycrystalline silicon film over the gate electrode, and a drain and a source are defined in second and third portions of the polycrystalline silicon film over the insulator substrate. Grain sizes of the drain and source are equal to or greater than a grain size of the channel.
    Type: Application
    Filed: July 1, 2004
    Publication date: December 2, 2004
    Applicants: Sanyo Electric Co., Ltd., Sony Corporation
    Inventors: Yushi Jinno, Ken Wakita, Masahiro Minegishi
  • Patent number: 6653179
    Abstract: For manufacturing a thin film semiconductor device, first conducted is a film-making step to make a non-single-crystalline semiconductor thin film (4) on an insulating substrate (1). Next conducted is an annealing step to irradiate laser light (50) for once heating and melting the non-single-crystalline semiconductor thin film (4) and then changing it into a polycrystal in its cooling process. Thereafter, a processing step is conducted to form thin film transistors in an integrated form, which includes the polycrystalline semiconductor thin film (4) as their active layer. For the purpose of ensuring uniform crystallization and enlargement of grain sizes, in the annealing step, by using a laser oscillator (51) including an excimer laser source, the laser light (50) having a pulse width not shorter than 50 ns is shaped by an optical system (53) to form a rectangular cross-sectional area whose sides are not shorter than 10 mm to sequentially irradiate the semiconductor thin film (4).
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: November 25, 2003
    Assignee: Sony Corporation
    Inventors: Masahiro Minegishi, Yasushi Shimogaichi, Makoto Takatoku, Hisao Hayashi
  • Publication number: 20010005020
    Abstract: A thin film transistor which can be used in an LCD display panel includes an insulator substrate, a gate electrode located on the insulator substrate, an insulator film provided on the insulator substrate and the gate electrode, and a polycrystalline silicon film located on the insulator film. A channel is defined in a first portion of the polycrystalline silicon film over the gate electrode, and a drain and a source are defined in second and third portions of the polycrystalline silicon film over the insulator substrate. Grain sizes of the drain and source are equal to or greater than a grain size of the channel.
    Type: Application
    Filed: January 3, 2001
    Publication date: June 28, 2001
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yushi Jinno, Ken Wakita, Masahiro Minegishi
  • Patent number: 6248606
    Abstract: In a method of manufacturing semiconductor chips for display, a semiconductor thin film is first formed on an insulating substrate, and then a series of processes including a heat-treatment process for the semiconductor thin film are carried out to form integrated thin film transistors on a sectioned area for one chip. Thereafter, pixel electrodes for one picture (frame) are formed within the sectioned area. During the series of processes, a laser pulse is irradiated onto the sectioned area by one shot to perform a heat treatment on the semiconductor thin film for one chip collectively and simultaneously (i.e., perform a batch heat treatment on the semiconductor thin film). Through the batch heat treatment, the crystallization of the semiconductor thin film is promoted. In addition, after the semiconductor thin film is doped with impurities, the activation of impurities doped in the semiconductor thin film can be performed by the batch heat treatment.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: June 19, 2001
    Assignee: Sony Corporation
    Inventors: Masumitsu Ino, Hisao Hayashi, Masafumi Kunii, Takenobu Urazono, Shizuo Nishihara, Masahiro Minegishi
  • Patent number: 6207971
    Abstract: A thin film transistor which can be used in an LCD display panel includes an insulator substrate, a gate electrode located on the insulator substrate, an insulator film provided on the insulator substrate and the gate electrode, and a polycrystalline silicon film located on the insulator film. A channel is defined in a first portion of the polycrystalline silicon film over the gate electrode, and a drain and a source are defined in second and third portions of the polycrystalline silicon film over the insulator substrate. Grain sizes of the drain and source are equal to or greater than a grain size of the channel.
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: March 27, 2001
    Assignees: Sanyo Electric Co., Ltd., Sony Corporation
    Inventors: Yushi Jinno, Ken Wakita, Masahiro Minegishi
  • Patent number: 6015720
    Abstract: Method of forming a high-quality polycrystalline semiconductor thin film having large grain sizes by laser annealing. First, a film formation step is carried out to grow a semiconductor layer on an insulating substrate under certain film formation conditions, thus forming a precursory film. This precursory film comprises clusters of microscopic crystal grains. Then, an irradiation step is carried out. That is, the precursory film is irradiated with a laser beam such as an excimer laser pulse. The crystal sizes are increased to change the precursory film into a polycrystalline semiconductor thin film. During the film formation step, a precursory film having a crystal grain size of more than 3 nm is formed at a temperature of 500 to 650.degree. C., for example, by LPCVD or APCVD. Under these conditions, the resulting polycrystalline precursory film is substantially free from hydrogen. During the irradiation step, a single pulse of excimer laser radiation is emitted.
    Type: Grant
    Filed: October 18, 1995
    Date of Patent: January 18, 2000
    Assignee: Sony Corporation
    Inventors: Masahiro Minegishi, Masumitsu Ino, Masafumi Kunii, Takenobu Urazono, Hisao Hayashi
  • Patent number: 5888839
    Abstract: In a method of manufacturing semiconductor chips for display, a semiconductor thin film is first formed on an insulating substrate, and then a series of processes including a heat-treatment process for the semiconductor thin film are carried out to form integrated thin film transistors on a sectioned area for one chip. Thereafter, pixel electrodes for one picture (frame) are formed within the sectioned area. During the series of processes, a laser pulse is irradiated onto the sectioned area by one shot to perform a heat treatment on the semiconductor thin film for one chip collectively and simultaneously (i.e., perform a batch heat treatment on the semiconductor thin film). Through the batch heat treatment, the crystallization of the semiconductor thin film is promoted. In addition, after the semiconductor thin film is doped with impurities, the activation of impurities doped in the semiconductor thin film can be performed by the batch heat treatment.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: March 30, 1999
    Assignee: Sony Corporation
    Inventors: Masumitsu Ino, Hisao Hayashi, Masafumi Kunii, Takenobu Urazono, Shizuo Nishihara, Masahiro Minegishi