Patents by Inventor Masahiro Mitsunaga

Masahiro Mitsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11031399
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. In a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a date on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: June 8, 2021
    Assignee: SONY CORPORATION
    Inventor: Masahiro Mitsunaga
  • Publication number: 20200227412
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Application
    Filed: March 23, 2020
    Publication date: July 16, 2020
    Inventor: MASAHIRO MITSUNAGA
  • Patent number: 10629598
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. In a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: April 21, 2020
    Assignee: SONY CORPORATION
    Inventor: Masahiro Mitsunaga
  • Publication number: 20190051649
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Application
    Filed: October 16, 2018
    Publication date: February 14, 2019
    Inventor: MASAHIRO MITSUNAGA
  • Patent number: 10109632
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: October 23, 2018
    Assignee: SONY CORPORATION
    Inventor: Masahiro Mitsunaga
  • Publication number: 20170271333
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Application
    Filed: June 2, 2017
    Publication date: September 21, 2017
    Inventor: MASAHIRO MITSUNAGA
  • Patent number: 9685445
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: June 20, 2017
    Assignee: SONY CORPORATION
    Inventor: Masahiro Mitsunaga
  • Publication number: 20150270266
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Application
    Filed: June 8, 2015
    Publication date: September 24, 2015
    Inventor: MASAHIRO MITSUNAGA
  • Patent number: 9059266
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: June 16, 2015
    Assignee: Sony Corporation
    Inventor: Masahiro Mitsunaga
  • Patent number: 8896028
    Abstract: A semiconductor device includes: an epitaxial substrate formed by stacking a plurality of kinds of semiconductors over one semiconductor substrate by epitaxial growth; a field effect transistor of a first conductivity type formed in a first region; a field effect transistor of a second conductivity type formed in a second region; and a protective element formed in a third region. The protective element includes: a first stacking structure formed by etching the epitaxial substrate by vertical etching that proceeds in a stacking thickness direction; and a second stacking structure formed by etching the epitaxial substrate by vertical etching that proceeds in a stacking thickness direction. The protective element has two PN junctions on a current path formed between an upper end of the first stacking structure and an upper end of the second stacking structure via a base part of the first stacking structure and the second stacking structure.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventors: Masahiro Mitsunaga, Shinichi Tamari, Yuji Ibusuki
  • Patent number: 8698202
    Abstract: A semiconductor device including at least a p-channel field-effect transistor region formed above a compound semiconductor substrate. The p-channel field-effect transistor region includes an undoped buffer layer; a p-type channel layer formed in contact with the buffer layer; a p-type source region and a p-type drain region formed in the channel layer, being separated with each other; and an n-type gate region formed above the channel layer and between the source region and the drain region. The buffer layer is formed having either a multilayer structure including a hole diffusion control layer with a band gap larger than the channel layer, or a single layer structure including only the hole diffusion control layer.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: April 15, 2014
    Assignee: Sony Corporation
    Inventors: Masahiro Mitsunaga, Shinichi Tamari, Yuji Ibusuki
  • Publication number: 20130307022
    Abstract: A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.
    Type: Application
    Filed: April 11, 2013
    Publication date: November 21, 2013
    Applicant: Sony Corporation
    Inventor: Masahiro Mitsunaga
  • Publication number: 20120126291
    Abstract: A semiconductor device including at least a p-channel field-effect transistor region formed above a compound semiconductor substrate. The p-channel field-effect transistor region includes an undoped buffer layer; a p-type channel layer formed in contact with the buffer layer; a p-type source region and a p-type drain region formed in the channel layer, being separated with each other; and an n-type gate region formed above the channel layer and between the source region and the drain region. The buffer layer is formed having either a multilayer structure including a hole diffusion control layer with a band gap larger than the channel layer, or a single layer structure including only the hole diffusion control layer.
    Type: Application
    Filed: October 21, 2011
    Publication date: May 24, 2012
    Applicant: SONY CORPORATION
    Inventors: Masahiro Mitsunaga, Shinichi Tamari, Yuji Ibusuki