Patents by Inventor Masahiro MITSUYASU

Masahiro MITSUYASU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9082508
    Abstract: In one embodiment, a semiconductor device includes a substrate, and one or more logic circuit regions disposed on the substrate, and including a plurality of logic circuit elements. The device further includes a memory region disposed on the substrate, including a plurality of memory cells, and having a shape to surround each of the one or more logic circuit regions.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: July 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masahiro Mitsuyasu
  • Publication number: 20150063006
    Abstract: In one embodiment, a semiconductor device includes a substrate, and one or more logic circuit regions disposed on the substrate, and including a plurality of logic circuit elements. The device further includes a memory region disposed on the substrate, including a plurality of memory cells, and having a shape to surround each of the one or more logic circuit regions.
    Type: Application
    Filed: March 10, 2014
    Publication date: March 5, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Masahiro MITSUYASU