Patents by Inventor Masahiro Nakayama

Masahiro Nakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250008780
    Abstract: A display apparatus with high resolution is provided. The display apparatus includes a transistor, a light-emitting device, a first insulating layer, a second insulating layer, and a first conductive layer. The transistor includes a semiconductor layer and a second conductive layer electrically connected to the semiconductor layer. The light-emitting device includes a pixel electrode. The first insulating layer is provided over the transistor and includes a first opening reaching the second conductive layer. The first conductive layer covers the first opening. The second insulating layer is provided over the first insulating layer and includes a second opening in a region overlapping with the first opening. The pixel electrode covers a top surface of the second insulating layer and the second opening. The pixel electrode is electrically connected to the second conductive layer through the first conductive layer. An end portion of the first insulating layer is positioned over the second conductive layer.
    Type: Application
    Filed: November 17, 2022
    Publication date: January 2, 2025
    Inventors: Masataka NAKADA, Masahiro KATAYAMA, Rai SATO, Yasuharu HOSAKA, Toshimitsu OBONAI, Masayoshi DOBASHI, Koji KUSUNOKI, Tomonori NAKAYAMA
  • Publication number: 20240392064
    Abstract: A polyester resin emulsion contains resin particles(S), each containing a polyester resin (A) obtained by polycondensation of an alcohol component and a carboxylic acid component, and an aqueous medium in which the resin particles(S) are dispersed, wherein the alcohol component contains tri- or tetra-alcohol having a backbone of a linear or branched saturated fatty acid with a carbon number of 4 to 6, and the ratio (OHV/AV) of a hydroxyl value (OHV) of the polyester resin (A) to an acid value (AV) of the polyester resin (A) is from 0.20 to 0.60.
    Type: Application
    Filed: May 21, 2024
    Publication date: November 28, 2024
    Applicant: Ricoh Company, Ltd.
    Inventors: Shinya Nakayama, Junichi Watanabe, Akinori Saitoh, Masahiro Yukikawa, akio Takei
  • Patent number: 12125919
    Abstract: To provide a novel metal oxide. The metal oxide includes a first region and a second region. A third region is included between the first region and the second region. An interface of the first region is covered with the third region. The crystallinity of the third region is lower than the crystallinity of the first region. The crystallinity of the second region is lower than the crystallinity of the third region. The size of the first region measured from an image observed with a transmission electron microscope is greater than or equal to 1 nm and less than or equal to 3 nm.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: October 22, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tomonori Nakayama, Masahiro Takahashi
  • Publication number: 20240321577
    Abstract: A metal oxide film with high electrical characteristics is provided. A metal oxide film with high reliability is provided. The metal oxide film contains indium, M (M is aluminum, gallium, yttrium, or tin), and zinc. In the metal oxide film, distribution of interplanar spacings d determined by electron diffraction by electron beam irradiation from a direction perpendicular to a film surface of the metal oxide film has a first peak and a second peak. The top of the first peak is positioned at greater than or equal to 0.25 nm and less than or equal to 0.30 nm, and the top of the second peak is positioned at greater than or equal to 0.15 nm and less than or equal to 0.20 nm. The distribution of the interplanar spacings d is obtained from a plurality of electron diffraction patterns of a plurality of regions of the metal oxide film. The electron diffraction is performed using an electron beam with a beam diameter of greater than or equal to 0.3 nm and less than or equal to 10 nm.
    Type: Application
    Filed: May 20, 2024
    Publication date: September 26, 2024
    Inventors: Toshimitsu OBONAI, Yasuharu HOSAKA, Kenichi OKAZAKI, Masahiro TAKAHASHI, Tomonori NAKAYAMA, Tomosato KANAGAWA, Shunpei YAMAZAKI
  • Patent number: 12098755
    Abstract: Provided is a flexible member that can exhibit excellent load resistance and flexibility while achieving a reduction in size. This flexible member includes: a main body part which has multiple wave washers stacked in an axial direction and joined to each other, and the main body part is able to be bent with respect to the axial direction due to elastic deformation of the wave washers; and a linking member that is elastically deformable, the linking member being provided at an end part of the main body part and being linked to other member. A deformation amount of the linking member is smaller than a deformation amount of the wave washer, when the main body part is bent.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: September 24, 2024
    Assignee: NHK SPRING CO., LTD.
    Inventors: Motoyuki Otsuka, Takafumi Hirata, Shimpei Kurokawa, Soichi Nakayama, Masahiro Inaba
  • Publication number: 20240269726
    Abstract: A method for producing an arm structure in which the arm structure is produced by: forming an arm precursor member having an external shape of the arm structure by, in a state in which a die is closed with a metal pipe member being disposed in a cavity thereof, pressurizing the pipe member with liquid supplied to an inside thereof to cause an external surface of the thus expanded pipe member to be pressed against an inner surface of the cavity; and forming a flange portion to be attached to a driven body by machining at least an end of the formed arm precursor member.
    Type: Application
    Filed: April 23, 2024
    Publication date: August 15, 2024
    Applicants: FANUC CORPORATION, TUBE FORMING CO., LTD.
    Inventors: Kazutaka NAKAYAMA, Kenichiro ABE, Masahiro MORIOKA, Yasutoyo OOKI, Keiichi TSUCHIYA
  • Patent number: 11999308
    Abstract: An impact energy absorbing member includes an energy absorbing portion and an attachment portion. The attachment portion is fastened to the bumper reinforcement using a fastener, the fastener extending through the attachment portion and a wall of the bumper reinforcement and including an axis that extends in a direction intersecting an axial direction of the energy absorbing portion. The attachment portion and the energy absorbing portion are in a positional relationship in which the energy absorbing portion does not overlap the fastener when the impact energy absorbing member is viewed in a direction from the bumper reinforcement toward the energy absorbing portion in a vehicle front-rear direction.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: June 4, 2024
    Assignees: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takuma Inoue, Shin Terada, Kazuyoshi Ogata, Masahiko Yasue, Kohei Mori, Masahiro Nakayama, Ryuta Kamiya
  • Publication number: 20220161747
    Abstract: An impact energy absorbing member includes an energy absorbing portion and an attachment portion. The attachment portion is fastened to the bumper reinforcement using a fastener, the fastener extending through the attachment portion and a wall of the bumper reinforcement and including an axis that extends in a direction intersecting an axial direction of the energy absorbing portion. The attachment portion and the energy absorbing portion are in a positional relationship in which the energy absorbing portion does not overlap the fastener when the impact energy absorbing member is viewed in a direction from the bumper reinforcement toward the energy absorbing portion in a vehicle front-rear direction.
    Type: Application
    Filed: April 1, 2020
    Publication date: May 26, 2022
    Applicants: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takuma INOUE, Shin TERADA, Kazuyoshi OGATA, Masahiko YASUE, Kohei MORI, Masahiro NAKAYAMA, Ryuta KAMIYA
  • Patent number: 11294746
    Abstract: A non-transitory computer-readable storage medium storing a program that causes a computer to execute a process, the process includes determining whether an error log is included in an operation log over a terminal; when the error log is included in the operation log, specifying a start timing and a stop timing of a script including the error log stored in a memory based on the operation log; and extracting moving image data output to the terminal during execution of the script based on time information related to the specified start timing and stop timing of the script.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: April 5, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Toshiyuki Fujishima, Susumu Koga, Masahiro Nakayama, Tomoyuki Kobayashi
  • Publication number: 20210096940
    Abstract: A non-transitory computer-readable storage medium storing a program that causes a computer to execute a process, the process includes determining whether an error log is included in an operation log over a terminal; when the error log is included in the operation log, specifying a start timing and a stop timing of a script including the error log stored in a memory based on the operation log; and extracting moving image data output to the terminal during execution of the script based on time information related to the specified start timing and stop timing of the script.
    Type: Application
    Filed: September 21, 2020
    Publication date: April 1, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Toshiyuki Fujishima, Susumu Koga, Masahiro Nakayama, Tomoyuki Kobayashi
  • Publication number: 20150379379
    Abstract: A printer includes a storage unit that spools print jobs, a print job sorting unit that sorts the spooled print jobs into a processing order, and a printing unit that performs printing on a paper roll in response to the print jobs in the sorted processing order. The print job sorting unit sorts the print jobs into a processing order based on medium attributes of the paper roll supplied to the printing unit and medium attributes which are requested in the print job.
    Type: Application
    Filed: June 15, 2015
    Publication date: December 31, 2015
    Inventors: Hiroaki Kubota, Masahiro Nakayama
  • Publication number: 20150170928
    Abstract: A fabrication method of a silicon carbide substrate includes the following steps. By slicing a silicon carbide ingot, a first intermediate substrate having a first main surface and second main surface opposite to each other and a first SORI value, is formed. By etching at least one of the first main surface and the second main surface of the first intermediate substrate, a second intermediate substrate having a second SORI value smaller than the first SORI value is formed. By grinding at least one of the first main surface and the second main surface of the second intermediate substrate, a third intermediate substrate having a third SORI value greater than the second SORI value is formed. Accordingly, a silicon carbide substrate with small warpage is provided.
    Type: Application
    Filed: December 16, 2013
    Publication date: June 18, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masahiro NAKAYAMA
  • Publication number: 20150135517
    Abstract: The present invention provides a degradation diagnosis device for a cell, the degradation diagnosis device for a cell comparing a potential variation characteristic of a comparison subject cell during discharging and after discharging is stopped and a potential variation characteristic of a degradation diagnosis subject cell during discharging and after discharging is stopped, in a case where the potential variation characteristic of the comparison subject cell during discharging and after discharging is stopped and the potential variation characteristic of the degradation diagnosis subject cell during discharging and after discharging is stopped are not same, diagnosing a cause of the degradation as including degradation of an active material, and in a case where they are same, diagnosing the cause of the degradation as being other than the active material.
    Type: Application
    Filed: June 1, 2012
    Publication date: May 21, 2015
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takayoshi Doi, Masahiro Nakayama, Satoshi Yoshida, Yuzo Miura
  • Patent number: 8723219
    Abstract: Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 ?m to Ra 6 ?m. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra10 nm and Ra5 ?m at edges of wafers.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: May 13, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masahiro Nakayama, Masato Irikura
  • Publication number: 20130292696
    Abstract: Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 ?m to Ra 6 ?m. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra10 nm and Ra5 ?m at edges of wafers.
    Type: Application
    Filed: July 8, 2013
    Publication date: November 7, 2013
    Inventors: MASAHIRO NAKAYAMA, MASATO IRIKURA
  • Patent number: 8482032
    Abstract: Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 ?m to Ra 6 ?m. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra 10 nm and Ra 5 ?m at edges of wafers.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: July 9, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masahiro Nakayama, Masato Irikura
  • Publication number: 20120135549
    Abstract: Polishing a nitride semiconductor monocrystalline wafer leaves it with a process-transformed layer. The process-transformed layer has to be etched to be removed. The chemical inertness of nitride semiconductor materials has, however, precluded suitable etching. Although potassium hydroxide, for example, or sulfuric acid have been proposed as GaN etchants, their ability to corrosively remove material from the Ga face is weak. Dry etching utilizing a halogen plasma is carried out in order to remove the process-transformed layer. The Ga face can be etched off with the halogen plasma. Nevertheless, owing to the dry etching, a problem arises again—surface contamination due to metal particles. To address the problem, wet etching with, as the etchant, solutions such as HF+H2O2, H2SO4+H2O2, HCl+H2O2, or HNO3, which are nonselective for Ga/N faces, have metal etching capability, and have an oxidation-reduction potential of 1.2 V or more, is performed.
    Type: Application
    Filed: February 6, 2012
    Publication date: May 31, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masahiro Nakayama, Naoki Matsumoto
  • Patent number: 8156999
    Abstract: This invention relates to an air conditioner having an air inlet at its upper portion. The heat exchanger (4) includes multiple plate fins (1) arranged in parallel so that air flows therebetween, and heat transfer tubes (2) perpendicularly inserted into the plate fins (1) and arranged perpendicularly to the air flow direction through which working fluid passes. The heat exchanger (4) includes a lower front heat exchanger (4a), an upper front heat exchanger (4b), and a rear heat exchanger (4c) separately produced and arranged to surround the circulating fan (5). The air pressure loss of the lower front heat exchanger (4a) is set to be smaller than the air pressure losses of the other heat exchangers.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: April 17, 2012
    Assignee: Mitsubisih Denki Kabushiki Kaisha
    Inventors: Akira Ishibashi, Hiroki Okazawa, Masahiro Nakayama, Tadashi Saitou
  • Patent number: 8133815
    Abstract: Compound-semiconductor-substrate polishing methods, compound semiconductor substrates, compound-semiconductor-epitaxial-substrate manufacturing methods, and compound semiconductor epitaxial substrates whereby oxygen superficially present on the substrates reduced. A compound semiconductor-substrate polishing method includes a preparation step (S10), a first polishing step (S20), and a second polishing step (S30). In the preparation step (S10), a compound semiconductor substrate is prepared. In the first polishing step (S20), the compound semiconductor substrate is polished with a chloric polishing agent. In the second polishing step (S30), subsequent to the first polishing step (S20), a polishing operation utilizing an alkaline aqueous solution containing an inorganic builder and having pH of 8.5 to 13.0 inclusive is performed.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: March 13, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshio Mezaki, Takayuki Nishiura, Masahiro Nakayama
  • Publication number: 20110297959
    Abstract: Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 ?m to Ra 6 ?m. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra 10 nm and Ra 5 ?m at edges of wafers.
    Type: Application
    Filed: August 17, 2011
    Publication date: December 8, 2011
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Masahiro NAKAYAMA, Masato Irikura