Patents by Inventor Masahiro Sakuratani
Masahiro Sakuratani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9330842Abstract: In a monolithic ceramic electronic component, given that an interval between outer-layer dummy conductors adjacent to each other in an outer layer portion is d1, and that an interval between first and second inner electrodes adjacent to each other in an inner layer portion is d2, 1.7d2?d1 is satisfied. By reducing a density of the outer-layer dummy conductors in the outer layer portion on that condition, pressing of the inner electrodes through the outer-layer dummy conductors is relieved in a pressing step before firing. As a result, a distance between the inner electrodes can be prevented from being locally shortened. It is hence possible to effectively reduce and prevent degradation of reliability of the monolithic ceramic electronic component, e.g., a reduction of BDV.Type: GrantFiled: December 30, 2013Date of Patent: May 3, 2016Assignee: Murata Manufacturing Co., Ltd.Inventors: Masahiro Sakuratani, Teppei Akazawa
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Patent number: 8902564Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.Type: GrantFiled: January 29, 2014Date of Patent: December 2, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Teppei Akazawa, Kenjiro Hadano, Masahiro Sakuratani
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Patent number: 8797708Abstract: Two or more outer-layer dummy conductors are successively arranged at predetermined intervals in the height direction, thereby forming a plurality of outer-layer dummy groups. Given that an interval between the adjacent outer-layer dummy conductors within each of the outer-layer dummy groups is d and an interval between the adjacent outer-layer dummy groups is g, g is greater than d. On that condition, the outer-layer dummy groups can be positioned satisfactorily apart away from each other, while plating deposition points are ensured. As a result, pressing of inner electrodes through the outer-layer dummy conductors can be relieved, whereby the distance between the inner electrodes can be prevented from being locally shortened and a reduction of BDV can be prevented.Type: GrantFiled: June 14, 2012Date of Patent: August 5, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Masahiro Sakuratani, Shigekatsu Yamamoto
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Publication number: 20140146438Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.Type: ApplicationFiled: January 29, 2014Publication date: May 29, 2014Applicant: Murata Manufacturing Co., Ltd.Inventors: Teppei AKAZAWA, Kenjiro HADANO, Masahiro SAKURATANI
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Publication number: 20140133063Abstract: In a monolithic ceramic electronic component, given that an interval between outer-layer dummy conductors adjacent to each other in an outer layer portion is d1, and that an interval between first and second inner electrodes adjacent to each other in an inner layer portion is d2, 1.7d2?d1 is satisfied. By reducing a density of the outer-layer dummy conductors in the outer layer portion on that condition, pressing of the inner electrodes through the outer-layer dummy conductors is relieved in a pressing step before firing. As a result, a distance between the inner electrodes can be prevented from being locally shortened. It is hence possible to effectively reduce and prevent degradation of reliability of the monolithic ceramic electronic component, e.g., a reduction of BDV.Type: ApplicationFiled: December 30, 2013Publication date: May 15, 2014Applicant: Murata Manufacturing Co., Ltd.Inventors: Masahiro SAKURATANI, Teppei AKAZAWA
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Patent number: 8687344Abstract: A laminated ceramic electronic component includes curved surface portions provided in an outer surface of a ceramic element assembly, and internal conductors provided within the ceramic element assembly that are exposed in the curved surface portions and principal surfaces to define starting points for plating deposition. A base layer, in an external conductor, which is defined by a plating film is arranged so as to directly cover the exposed portions of the internal conductors.Type: GrantFiled: June 12, 2012Date of Patent: April 1, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Teppei Akazawa, Kenjiro Hadano, Masahiro Sakuratani
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Patent number: 8675341Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.Type: GrantFiled: January 25, 2012Date of Patent: March 18, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Teppei Akazawa, Kenjiro Hadano, Masahiro Sakuratani
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Patent number: 8654504Abstract: In a monolithic ceramic electronic component, given that an interval between outer-layer dummy conductors adjacent to each other in an outer layer portion is d1, and that an interval between first and second inner electrodes adjacent to each other in an inner layer portion is d2, 1.7d2?d1 is satisfied. By reducing a density of the outer-layer dummy conductors in the outer layer portion on that condition, pressing of the inner electrodes through the outer-layer dummy conductors is relieved in a pressing step before firing. As a result, a distance between the inner electrodes can be prevented from being locally shortened. It is hence possible to effectively reduce and prevent degradation of reliability of the monolithic ceramic electronic component, e.g., a reduction of BDV.Type: GrantFiled: July 30, 2012Date of Patent: February 18, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Masahiro Sakuratani, Teppei Akazawa
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Patent number: 8599532Abstract: In a monolithic ceramic electronic component, where a distance in the height direction between one of outer-layer dummy conductors in an outer layer portion, which is arranged closest to an inner layer portion, and one of inner electrodes in the inner layer portion, which is arranged closest to the outer layer portion, is b, and an opposing distance between an adjacent pair of first inner electrodes and second inner electrodes in the height direction is t, 2t?b is satisfied, such that the outer-layer dummy conductors can be spaced a sufficient distance away from the inner electrodes, and such that the distance between the inner electrodes can be prevented from being reduced when the inner electrodes arranged in overlapping relation to the outer-layer dummy conductors are pressed in a pressing step before firing, and a reduction of BDV can be prevented.Type: GrantFiled: June 14, 2012Date of Patent: December 3, 2013Assignee: Murata Manufactuing Co., Ltd.Inventor: Masahiro Sakuratani
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Publication number: 20130033154Abstract: In a monolithic ceramic electronic component, given that an interval between outer-layer dummy conductors adjacent to each other in an outer layer portion is d1, and that an interval between first and second inner electrodes adjacent to each other in an inner layer portion is d2, 1.7d2?d1 is satisfied. By reducing a density of the outer-layer dummy conductors in the outer layer portion on that condition, pressing of the inner electrodes through the outer-layer dummy conductors is relieved in a pressing step before firing. As a result, a distance between the inner electrodes can be prevented from being locally shortened. It is hence possible to effectively reduce and prevent degradation of reliability of the monolithic ceramic electronic component, e.g., a reduction of BDV.Type: ApplicationFiled: July 30, 2012Publication date: February 7, 2013Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Masahiro SAKURATANI, Teppei AKAZAWA
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Publication number: 20120319537Abstract: Two or more outer-layer dummy conductors are successively arranged at predetermined intervals in the height direction, thereby forming a plurality of outer-layer dummy groups. Given that an interval between the adjacent outer-layer dummy conductors within each of the outer-layer dummy groups is d and an interval between the adjacent outer-layer dummy groups is g, g is greater than d. On that condition, the outer-layer dummy groups can be positioned satisfactorily apart away from each other, while plating deposition points are ensured. As a result, pressing of inner electrodes through the outer-layer dummy conductors can be relieved, whereby the distance between the inner electrodes can be prevented from being locally shortened and a reduction of BDV can be prevented.Type: ApplicationFiled: June 14, 2012Publication date: December 20, 2012Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Masahiro SAKURATANI, Shigekatsu YAMAMOTO
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Publication number: 20120319536Abstract: In a monolithic ceramic electronic component, where a distance in the height direction between one of outer-layer dummy conductors in an outer layer portion, which is arranged closest to an inner layer portion, and one of inner electrodes in the inner layer portion, which is arranged closest to the outer layer portion, is b, and an opposing distance between an adjacent pair of first inner electrodes and second inner electrodes in the height direction is t, 2t?b is satisfied, such that the outer-layer dummy conductors can be spaced a sufficient distance away from the inner electrodes, and such that the distance between the inner electrodes can be prevented from being reduced when the inner electrodes arranged in overlapping relation to the outer-layer dummy conductors are pressed in a pressing step before firing, and a reduction of BDV can be prevented.Type: ApplicationFiled: June 14, 2012Publication date: December 20, 2012Applicant: MURATA MANUFACTURING CO., LTD.Inventor: Masahiro SAKURATANI
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Publication number: 20120320495Abstract: A laminated ceramic electronic component includes curved surface portions provided in an outer surface of a ceramic element assembly, and internal conductors provided within the ceramic element assembly that are exposed in the curved surface portions and principal surfaces to define starting points for plating deposition. A base layer, in an external conductor, which is defined by a plating film is arranged so as to directly cover the exposed portions of the internal conductors.Type: ApplicationFiled: June 12, 2012Publication date: December 20, 2012Applicant: Murata Manufacturing Co., Ltd.Inventors: Teppei AKAZAWA, Kenjiro HADANO, Masahiro SAKURATANI
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Publication number: 20120188684Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.Type: ApplicationFiled: January 25, 2012Publication date: July 26, 2012Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Teppei AKAZAWA, Kenjiro HADANO, Masahiro SAKURATANI
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Patent number: 5865920Abstract: In a method of forming an electrode on a ceramic green sheet, an electrode is formed on a support film by a thin film forming method, an adhesion inhibitor is formed on top of the electrode for protecting the same from adhesion of a ceramic slurry, and thereafter a ceramic slurry is applied onto the support film to form a ceramic green sheet, thereby obtaining a ceramic green sheet, provided with a through electrode.Type: GrantFiled: August 11, 1997Date of Patent: February 2, 1999Assignee: Murata Manufacturing Co., Ltd.Inventors: Masahiro Sakuratani, Isao Kaizaki