Patents by Inventor Masahiro Takatori

Masahiro Takatori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5315581
    Abstract: A hit-less protection switching method and apparatus therefor for ATM transmission lines for selecting first cells from normal received signals and writing the same into a normal cell buffer, selecting second cells from emergency received signals and writing the same into an emergency cell buffer, reading the first cells from the normal cell buffer after a first delay time, reading the second cells from the emergency cell buffer after a second delay time, comparing the contents of the first cell with the contents of the second cell and changing the difference between the first delay time and the second delay time, when a state of discrepancy between the contents of the first cell and the contents of the second cell is continuously detected for a predetermined time, to dissolve the state of discrepancy, and selecting one of the cells read from the normal cell buffer and the emergency cell buffer with a delay as communications information.
    Type: Grant
    Filed: August 14, 1991
    Date of Patent: May 24, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Yukio Nakano, Akihiko Takase, Masahiro Takatori, Junichirou Yanagi
  • Patent number: 5271006
    Abstract: A frame aligner and a method and system for control thereof, in which the frame alignment is executed while assuring TSSI (Time Slot Sequence Integrity). In a system for transmitting a plurality of low-speed signals having a frame structure in a high-speed frame, a plurality of candidates for a write start phase for a frame aligner memory are set, and by accessing a common phase memory storing a write start phase shared by low-speed signals requiring phase matching therebetween of all the low-speed signals stored in the high-speed frame, a write start phase is selected from among the candidates for the write start phase for the frame aligner memory.
    Type: Grant
    Filed: March 19, 1991
    Date of Patent: December 14, 1993
    Assignees: Hitachi, Ltd., Nippon Telegraph and Telephone Corporation
    Inventors: Yoshihiro Ashi, Tadayuki Kanno, Masahiro Takatori, Hiromi Ueda
  • Patent number: 5197063
    Abstract: A circuit switching apparatus and method for time division network with various transmission speeds for time-division multiplexing a plurality of circuits including signals at different transmission speeds, transmitting the same onto an input highway, repeatedly recording the transmitted signals in a data memory in a predetermined order, reading respective recorded signals in a predetermined order onto an output highway. An access unit for reading signals from the data memory has an address control memory for storing circuit switching information, a circuit speed control memory for storing transmission speed information for the respective circuits and an address generating section for generating an address for accessing the data memory on the basis of the circuit switching information and the circuit transmission speed information from those memories.
    Type: Grant
    Filed: January 16, 1991
    Date of Patent: March 23, 1993
    Assignees: Hitachi, Ltd., Nippon Telegraph and Telephone Corporation
    Inventors: Yukio Nakano, Tadayuki Kanno, Masahiro Takatori, Hiromi Ueda
  • Patent number: 5189668
    Abstract: An ATM switch has a plurality of concentration space-division switches each constituted with an S-stage connection of switch modules. Each of the switch modules includes M buffers and a selector for selecting an arbitrary one of outputs from the M buffers. Each stage includes switch modules of which the number is obtained by multiplying by at most M a number of switch modules disposed in a stage succeeding thereto. The S stages include a final stage constituted with a switch module.
    Type: Grant
    Filed: August 7, 1991
    Date of Patent: February 23, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Takatori, Yukio Nakano, Yoshihiro Ashi, Tadayuki Kanno
  • Patent number: 5128939
    Abstract: Disclosed is a method and apparatus of phase-converting a frame, each frame containing a plurality of data, a frame synchronous signal arranged in a predetermined first relative phase position in the frame, and a pointer arranged in a predetermined second relative phase position and storing a value indicating a phase difference between the second relative phase position and the front position of the data in the frame, in which the following operations are carried out: consecutively receiving the frames; sequentially arranging a predetermined number of data among the plurality of data in the received frame in a transmission frame in accordance with a received order, and arranging the frame synchronous signal and the pointer in the received frame in the first relative phase position and the second relative phase position, the first relative phase position being independent to the second relative phase position, to form the tansmission frame; detecting a fourth relative phase position in the transmission frame,
    Type: Grant
    Filed: April 11, 1990
    Date of Patent: July 7, 1992
    Assignees: Hitachi, Ltd., Nippon Telegraph and Telephone Corporation
    Inventors: Masahiro Takatori, Yukio Nakano, Tadayuki Kanno, Hiromi Ueda
  • Patent number: 5042027
    Abstract: A communication network system includes a communication line, a plurality of communication stations each having a node coupled to the communication line and a network controller coupled to the stations for controlling routing for communication messages between nodes. In one embodiment, the messages are sent from plural terminals connected with each node along with communication performance prerequisites. The communication performance prerequisites for a communication message are discriminated in the node which receives the message. Traffic in various routes between the nodes is continually measured in the communication stations and the measuring results are stored in a database storage unit.
    Type: Grant
    Filed: September 8, 1989
    Date of Patent: August 20, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Takase, Masahiro Takatori, Yoshiaki Takemura, Naoya Kobayashi, Yasushi Sawada, Yukio Nakano, Yasushi Takahashi, Masahiro Koya, Yoshitaka Takasaki