Abstract: An adhesive layer (18) in which the same number of first and second layers (14,16) having conductivity are alternately laminated in order on a semiconductor substrate (10). A metal layer (24) is formed on the adhesive layer (18). The first layer (14) is composed of a material containing an element composing the semiconductor substrate (10). The second layer (16) has higher adhesion to the metal layer (24) than the first layer (14). The adhesive layer (18) has four or more layers including the first and second layers (14,16). Among the first layers (14) and the second layers (16) constituting the adhesive layer (18), excluding the second layer (16) contacting the metal layer (24), the first layer (14) contacting the semiconductor substrate (10) has the largest film thickness, and excluding the first layer (14) contacting the semiconductor substrate (10), the second layer (16) contacting the metal layer (24) has the largest film thickness.

Abstract: An adhesive layer (18) in which the same number of first and second layers (14,16) having conductivity are alternately laminated in order on a semiconductor substrate (10). A metal layer (24) is formed on the adhesive layer (18). The first layer (14) is composed of a material containing an element composing the semiconductor substrate (10). The second layer (16) has higher adhesion to the metal layer (24) than the first layer (14). The adhesive layer (18) has four or more layers including the first and second layers (14,16). Among the first layers (14) and the second layers (16) constituting the adhesive layer (18), excluding the second layer (16) contacting the metal layer (24), the first layer (14) contacting the semiconductor substrate (10) has the largest film thickness, and excluding the first layer (14) contacting the semiconductor substrate (10), the second layer (16) contacting the metal layer (24) has the largest film thickness.

Abstract: An MIM capacitor or an MIS capacitor in semiconductor devices is formed of a thin dielectric layer having a total film thickness less than 100-nm and including a high-dielectric-constant amorphous insulating film, high-breakdown-voltage amorphous films such as of SiO2, and high-dielectric-constant amorphous buffer films between an upper electrode and a lower electrode. The thin high-dielectric-constant amorphous insulation film is formed of a material having a property resistant to fracture although having properties of a large leakage current and a low breakdown voltage, to enhance reliability of the thin dielectric layer and to reduce the footprint thereof in the semiconductor device.

Abstract: An MIM capacitor or an MIS capacitor in semiconductor devices is formed of a thin dielectric layer having a total film thickness less than 100-nm and including a high-dielectric-constant amorphous insulating film, high-breakdown-voltage amorphous films such as of SiO2, and high-dielectric-constant amorphous buffer films between an upper electrode and a lower electrode. The thin high-dielectric-constant amorphous insulation film is formed of a material having a property resistant to fracture although having properties of a large leakage current and a low breakdown voltage, to enhance reliability of the thin dielectric layer and to reduce the footprint thereof in the semiconductor device.

Abstract: A semiconductor device includes: a semiconductor substrate; a gate electrode on the semiconductor substrate; a SiN film on the semiconductor substrate and the gate electrode; and an oxide film on the SiN film, wherein the oxide film is an atomic layer deposition film including atomic layers alternately deposited.

Abstract: A semiconductor device includes: a semiconductor substrate; a gate electrode on the semiconductor substrate; a SiN film on the semiconductor substrate and the gate electrode; and an oxide film on the SiN film, wherein the oxide film is an atomic layer deposition film including atomic layers alternately deposited.

Abstract: A semiconductor device includes a substrate, a metal film on a portion of the substrate, a first dielectric film having a first portion on the metal film and a second portion on the substrate, the second portion being integral with the first portion, a lower electrode on the first portion, a second dielectric film having a first portion on the lower electrode and a second portion on the first dielectric film, the second portion of the second dielectric film being integral with the first portion of said second dielectric film, an upper electrode on a portion of the second dielectric film, and a reinforcing film disposed on the second dielectric film and in contact with a side of the upper electrode.

Abstract: A semiconductor device includes a substrate, a metal film on a portion of the substrate, a first dielectric film having a first portion on the metal film and a second portion on the substrate, the second portion being integral with the first portion, a lower electrode on the first portion, a second dielectric film having a first portion on the lower electrode and a second portion on the first dielectric film, the second portion of the second dielectric film being integral with the first portion of said second dielectric film, an upper electrode on a portion of the second dielectric film, and a reinforcing film disposed on the second dielectric film and in contact with a side of the upper electrode.

Abstract: A method of manufacturing a semiconductor device includes forming a lower electrode on a semiconductor substrate, applying a photoresist on the lower electrode, forming an opening in the photoresist spaced from the periphery of the lower electrode, forming a high-dielectric constant film of a high-k material having a dielectric constant of 10 or more, performing liftoff so that the high-dielectric-constant film remains on the lower electrode, and forming an upper electrode on the high-dielectric-constant film remaining after the liftoff.

Abstract: A method of manufacturing a semiconductor device includes forming a lower electrode on a semiconductor substrate, applying a photoresist on the lower electrode, forming an opening in the photoresist spaced from the periphery of the lower electrode, forming a high-dielectric constant film of a high-k material having a dielectric constant of 10 or more, performing liftoff so that the high-dielectric-constant film remains on the lower electrode, and forming an upper electrode on the high-dielectric-constant film remaining after the liftoff.

Abstract: A method of manufacturing a semiconductor device includes forming a lower electrode on a semiconductor substrate, applying a photoresist on the lower electrode, forming an opening in the photoresist spaced from the periphery of the lower electrode, forming a high-dielectric constant film of a high-k material having a dielectric constant of 10 or more, performing liftoff so that the high-dielectric-constant film remains on the lower electrode, and forming an upper electrode on the high-dielectric-constant film remaining after the liftoff.

Abstract: A method of manufacturing a semiconductor device includes forming a lower electrode on a semiconductor substrate, applying a photoresist on the lower electrode, forming an opening in the photoresist spaced from the periphery of the lower electrode, forming a high-dielectric constant film of a high-k material having a dielectric constant of 10 or more, performing liftoff so that the high-dielectric-constant film remains on the lower electrode, and forming an upper electrode on the high-dielectric-constant film remaining after the liftoff.

Abstract: Passivation films including first and second layers (first passivation film) are formed on a GaAs substrate (semiconductor substrate). A SiN film (second passivation film) is formed on the passivation films as a top layer passivation film by catalytic chemical vapor deposition. The SiN film formed by catalytic chemical vapor deposition has a lower degree of hygroscopicity than that of a conventional SiN film formed by plasma chemical vapor deposition.

Abstract: A low-cost field-effect transistor with a moisture-resistant gate covered by a thick moisture-resistant insulating film which suppresses an increase in gate capacitance, and a method of manufacturing the field-effect transistor. The field-effect transistor has one of a T-shaped gate electrode and ?-shaped gate electrode, a drain electrode, and a source electrode, the source electrode and the drain electrode being electrically connected through an n-doped semiconductor region. The gate, source, and drain electrodes are located on a semiconductor layer which includes an insulating film having a thickness of 50 nm or less and covering a surface of the gate electrode and a surface of the semiconductor layer. A silicon nitride film, deposited by catalytic CVD, covers the insulating film and includes a void volume located between a portion of the gate electrode corresponding to a canopy of an open umbrella and the semiconductor layer.

Abstract: Passivation films including first and second layers (first passivation film) are formed on a GaAs substrate (semiconductor substrate). A SiN film (second passivation film) is formed on the passivation films as a top layer passivation film by a catalytic chemical vapor deposition. The SiN film formed by catalytic chemical vapor deposition has a lower degree of hygroscopicity than that of a conventional SiN film formed by plasma chemical vapor deposition.

Abstract: A low-cost field-effect transistor with a moisture-resistant gate covered by a thick moisture-resistant insulating film which suppresses an increase in gate capacitance, and a method of manufacturing the field-effect transistor. The field-effect transistor, has one of a T-shaped gate electrode and ?-shaped gate electrode, a drain electrode, and a source electrode, the source electrode and the drain electrode being electrically connected through an n-doped semiconductor region. The gate, source, and drain electrodes are located on a semiconductor layer which includes an insulating film having a thickness of 50 nm or less and covering a surface of the gate electrode and a surface of the semiconductor layer. A silicon nitride film, deposited by catalytic CVD, covers the insulating film and includes a void volume located between a portion of the gate electrode corresponding to a canopy of an open umbrella and the semiconductor layer.

Abstract: A method of manufacturing a semiconductor device including a gallium nitride related semiconductor. The method include preparing a substrate having surface of a gallium nitride related semiconductor; contacting the surface with atomic nitrogen, which is obtained by decomposing a nitrogen-containing gas in a catalytic reaction, to nitride the surface; and forming, on the surface, a gate electrode and source and drain electrodes opposing each other across the gate electrode.

Abstract: A process of manufacturing a semiconductor device uses catalytic chemical vapor deposition. In the process, a reaction chamber containing a catalyzer and a substrate has gasses, including silane, ammonia, and hydrogen supplied to the reaction chamber. The gases are brought into contact with the catalyzer and then with the substrate to deposit a silicon nitride film.

Abstract: A method of manufacturing a semiconductor device including a gallium nitride related semiconductor. The method include preparing a substrate having surface of a gallium nitride related semiconductor; contacting the surface with atomic nitrogen, which is obtained by decomposing a nitrogen-containing gas in a catalytic reaction, to nitride the surface; and forming, on the surface, a gate electrode and source and drain electrodes opposing each other across the gate electrode.

Abstract: A process of manufacturing a semiconductor device uses catalytic chemical vapor deposition process, and has three steps. In the process, a reaction chamber (10) including a catalyzer (6) and a substrate (1) therein is provided. Gases including silane gas, ammonia gas, and hydrogen gas are provided. The gases are supplied to the reaction chamber, the gases are brought into contact with the catalyzer, and then towards onto the substrate to deposit the silicon nitride film.