Patents by Inventor Masahiro TSURUYA

Masahiro TSURUYA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10908988
    Abstract: A storage apparatus includes: a controller; and a plurality of storage drives, wherein the controller issues a read command for specifying a value associated with an error correction mode to a first storage drive of the plurality of storage drives, the first storage drive selects the error correction mode associated with the value specified by the read command from a plurality of error correction modes, the plurality of error correction modes include a first error correction mode and a second error correction mode with a higher correcting capability and a longer maximum delay time than those of the first error correction mode, and the first storage drive executes a read of data from a storage medium in the selected error correction mode.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: February 2, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Date, Hideyuki Koseki, Akifumi Suzuki, Masahiro Tsuruya
  • Patent number: 10896700
    Abstract: A system including a first storage drive and a superior device superior to the first storage drive, wherein the superior device specifies a first allowable environmental temperature that makes the remaining lifetime of the first storage drive longer than the remaining operation schedule period of the first storage drive, and controls an environmental temperature adjusting device that adjusts the environmental temperature of the first storage drive on the basis of the first allowable environmental temperature.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: January 19, 2021
    Assignee: HITACHI, LTD.
    Inventors: Masahiro Tsuruya, Masahiro Arai, Akifumi Suzuki, Shimpei Nomura
  • Patent number: 10884630
    Abstract: A storage system includes a controller and a nonvolatile memory drive, in which the controller transmits a write request that designates a volume identifier of a volume to be provided to a host, to the nonvolatile memory drive; the nonvolatile memory drive exclusively allocates a free block selected from a plurality of blocks to the volume identifier; write data of the write request is written to the free block; when the write data is update write data, an area that stores data to be updated is changed to an invalid data area; and after valid data of a block including the invalid data area is migrated to another block, all data of the block including the invalid data area is erased.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: January 5, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Koji Hosogi, Naoya Okada, Akifumi Suzuki, Hideyuki Koseki, Masahiro Tsuruya
  • Patent number: 10768838
    Abstract: When a logical capacity of a nonvolatile semiconductor memory is increased, after a logical capacity which is allocated to a RAID group but unused is released, the RAID group is reconfigured to include the released logical capacity and the increased logical capacity. When the logical capacity of the nonvolatile semiconductor memory is reduced, after the reduced logical capacity is released from the RAID group, the RAID group is reconfigured with the released logical capacity.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: September 8, 2020
    Assignee: HITACHI, LTD.
    Inventors: Shimpei Nomura, Masahiro Tsuruya, Akifumi Suzuki
  • Publication number: 20200272359
    Abstract: To improve performance of a storage system. The storage system includes a plurality of storage nodes that communicate via a network. Each of the plurality of storage nodes includes one or more controllers. At least one controller in the controllers specifies at least two controllers that allocate a cache sub-area where write data is stored based on a controller that receives the write data from a host and a controller that processes the write date, and the cache sub-area is allocated in the specified controllers.
    Type: Application
    Filed: August 27, 2019
    Publication date: August 27, 2020
    Inventors: Masahiro TSURUYA, Tomohiro YOSHIHARA, Ryosuke TATSUMI, Shinsuke IZAWA
  • Publication number: 20200073586
    Abstract: An information processing apparatus includes a storage controller and a storage device. The storage controller manages a first address space in which data is recorded in a log-structured format in response to a write request from a host. The storage device manages a second address space in which data is recorded in a log-structured format in response to a write request from the storage controller. The storage controller sets a unit by which the storage controller performs garbage collection in the first address space to a multiple of a unit by which the storage device performs garbage collection in the second address space.
    Type: Application
    Filed: March 5, 2019
    Publication date: March 5, 2020
    Inventors: Naruki KURATA, Hiroki FUJII, Masahiro TSURUYA
  • Publication number: 20190361611
    Abstract: A storage system includes a controller and a nonvolatile memory drive, in which the controller transmits a write request that designates a volume identifier of a volume to be provided to a host, to the nonvolatile memory drive; the nonvolatile memory drive exclusively allocates a free block selected from a plurality of blocks to the volume identifier; write data of the write request is written to the free block; when the write data is update write data, an area that stores data to be updated is changed to an invalid data area; and after valid data of a block including the invalid data area is migrated to another block, all data of the block including the invalid data area is erased.
    Type: Application
    Filed: April 13, 2017
    Publication date: November 28, 2019
    Inventors: Koji HOSOGI, Naoya OKADA, Akifumi SUZUKI, Hideyuki KOSEKI, Masahiro TSURUYA
  • Publication number: 20190278486
    Abstract: In a storage system capable of making connection to one or more SSDs and capable of controlling inputting and outputting of data to and from a storage region of the SSD, the storage system includes a processor that executes a process. The processor is configured to manage a part of a storage region provided by the one or more SSDs with the same characteristics as a first storage region (performance maintenance region) used to store predetermined data, determine data to be stored in the first storage region in data of which a write access frequency is less than a predetermined value, store the data in the first storage region, and store data determined not to be stored in the first storage region in a second storage region (a normal region) which is different from the first storage region and is provided by the one or SSDs with the same characteristics.
    Type: Application
    Filed: August 2, 2018
    Publication date: September 12, 2019
    Applicant: HITACHI, LTD.
    Inventors: Takahiro Naruko, Masahiro Tsuruya, Akifumi Suzuki, Shimpei Nomura
  • Patent number: 10394480
    Abstract: It is possible to prevent unoccupied blocks from being depleted by a write of logical-physical management information. A processor is capable of performing an unoccupied user block generation process by moving user data stored in allocated user blocks in order to generate unoccupied user blocks serving as unoccupied blocks among allocated user blocks, and performing an unoccupied meta block generation process by moving meta data stored in allocated meta blocks in order to generate unoccupied meta blocks serving as unoccupied blocks among the allocated meta blocks. The processor calculates the number of unoccupied meta blocks to be consumed, that is, the number of unoccupied meta blocks to be consumed by the unoccupied user block generation process. The processor performs the unoccupied meta block generation process based on the number of unoccupied meta blocks to be consumed.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: August 27, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Tsuruya, Ryo Hanafusa, Osamu Kawaguchi
  • Publication number: 20190213078
    Abstract: A storage apparatus includes: a controller; and a plurality of storage drives, wherein the controller issues a read command for specifying a value associated with an error correction mode to a first storage drive of the plurality of storage drives, the first storage drive selects the error correction mode associated with the value specified by the read command from a plurality of error correction modes, the plurality of error correction modes include a first error correction mode and a second error correction mode with a higher correcting capability and a longer maximum delay time than those of the first error correction mode, and the first storage drive executes a read of data from a storage medium in the selected error correction mode.
    Type: Application
    Filed: April 3, 2017
    Publication date: July 11, 2019
    Inventors: Mitsuo DATE, Hideyuki KOSEKI, Akifumi SUZUKI, Masahiro TSURUYA
  • Publication number: 20190205053
    Abstract: When a logical capacity of a nonvolatile semiconductor memory is increased, after a logical capacity which is allocated to a RAID group but unused is released, the RAID group is reconfigured to include the released logical capacity and the increased logical capacity. When the logical capacity of the nonvolatile semiconductor memory is reduced, after the reduced logical capacity is released from the RAID group, the RAID group is reconfigured with the released logical capacity.
    Type: Application
    Filed: January 12, 2017
    Publication date: July 4, 2019
    Applicant: Hitachi, Ltd.
    Inventors: Shimpei NOMURA, Masahiro TSURUYA, Akifumi SUZUKI
  • Publication number: 20190205035
    Abstract: A storage apparatus includes: a flash memory that provides a storage area; a controller that controls writing and reading of data to and from the storage area; and a buffer memory that temporarily stores data to be written in the storage area, in which the controller selects one compression method from a first reversible compression method and a second reversible compression method based on access performance to the flash memory, and determines to compress data based on the selected one compression method and to write the compressed data to the storage area, and the first reversible compression method has a lower compression ratio and a slower compression speed than the second reversible compression method.
    Type: Application
    Filed: November 8, 2016
    Publication date: July 4, 2019
    Inventors: Nagamasa MIZUSHIMA, Masahiro TSURUYA, Masahiro ARAI
  • Publication number: 20190198063
    Abstract: A system including a first storage drive and a superior device superior to the first storage drive, wherein the superior device specifies a first allowable environmental temperature that makes the remaining lifetime of the first storage drive longer than the remaining operation schedule period of the first storage drive, and controls an environmental temperature adjusting device that adjusts the environmental temperature of the first storage drive on the basis of the first allowable environmental temperature.
    Type: Application
    Filed: April 19, 2017
    Publication date: June 27, 2019
    Inventors: Masahiro TSURUYA, Masahiro ARAI, Akifumi SUZUKI, Shimpei NOMURA
  • Patent number: 10120592
    Abstract: A storage subsystem constituting a pool using storage media having rewrite life and providing a logical volume having a virtual capacity to a host, wherein the storage subsystem monitors whether shortage of a remaining rewrite life of the capacity pool will occur or not within an operation period of the storage subsystem, and when it is determined that shortage of the remaining rewrite life will occur, the subsystem converts the rewrite life required to cover the shortage into drive capacity and indicates the same, or indicates the same by reducing an existing pool capacity, and requests maintenance of the subsystem. A maintenance method is provided, wherein elongation of life is executed by adding a capacity to the pool at the time of indication, and as for addition of capacity other than the elongation of life described above, a maintenance fee is charged.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: November 6, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Arai, Masahiro Tsuruya
  • Publication number: 20180314426
    Abstract: It is possible to prevent unoccupied blocks from being depleted by a write of logical-physical management information. A processor is capable of performing an unoccupied user block generation process by moving user data stored in allocated user blocks in order to generate unoccupied user blocks serving as unoccupied blocks among allocated user blocks, and performing an unoccupied meta block generation process by moving meta data stored in allocated meta blocks in order to generate unoccupied meta blocks serving as unoccupied blocks among the allocated meta blocks. The processor calculates the number of unoccupied meta blocks to be consumed, that is, the number of unoccupied meta blocks to be consumed by the unoccupied user block generation process. The processor performs the unoccupied meta block generation process based on the number of unoccupied meta blocks to be consumed.
    Type: Application
    Filed: January 22, 2016
    Publication date: November 1, 2018
    Inventors: Masahiro TSURUYA, Ryo HANAFUSA, Osamu KAWAGUCHI
  • Patent number: 10049042
    Abstract: The present invention improves an access performance in an SSD device in which a nonvolatile semiconductor, such as a NAND flash memory, is mounted, or in a storage subsystem having the SSD device built therein, and achieves longer operating life. For this purpose, a plurality of units (logical-physical sizes) for associating a logical address with a physical address is provided in the SSD device or the storage subsystem, and an appropriate logical-physical size is selected in accordance with an I/O size or I/O pattern accessed from a superior device.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: August 14, 2018
    Assignee: HITACHI, LTD.
    Inventors: Masahiro Tsuruya, Atsushi Kawamura, Akifumi Suzuki, Hideyuki Koseki
  • Publication number: 20170277631
    Abstract: The present invention improves an access performance in an SSD device in which a nonvolatile semiconductor, such as a NAND flash memory, is mounted, or in a storage subsystem having the SSD device built therein, and achieves longer operating life. For this purpose, a plurality of units (logical-physical sizes) for associating a logical address with a physical address is provided in the SSD device or the storage subsystem, and an appropriate logical-physical size is selected in accordance with an I/O size or I/O pattern accessed from a superior device.
    Type: Application
    Filed: September 22, 2014
    Publication date: September 28, 2017
    Applicant: HITACHI, LTD.
    Inventors: Masahiro TSURUYA, Atsushi KAWAMURA, Akifumi SUZUKI, Hideyuki KOSEKI
  • Publication number: 20170003891
    Abstract: A storage subsystem constituting a pool using storage media having rewrite life and providing a logical volume having a virtual capacity to a host, wherein the storage subsystem monitors whether shortage of a remaining rewrite life of the capacity pool will occur or not within an operation period of the storage subsystem, and when it is determined that shortage of the remaining rewrite life will occur, the subsystem converts the rewrite life required to cover the shortage into drive capacity and indicates the same, or indicates the same by reducing an existing pool capacity, and requests maintenance of the subsystem. A maintenance method is provided, wherein elongation of life is executed by adding a capacity to the pool at the time of indication, and as for addition of capacity other than the elongation of life described above, a maintenance fee is charged.
    Type: Application
    Filed: September 26, 2014
    Publication date: January 5, 2017
    Applicant: Hitachi, Ltd.
    Inventors: Masahiro ARAI, Masahiro TSURUYA