Patents by Inventor Masahiro Yanagida

Masahiro Yanagida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10326134
    Abstract: An object of the present invention is to provide a novel sulfur-based positive electrode active material for a lithium-ion secondary battery which is excellent in cyclability and can largely improve a charging and discharging capacity, a positive electrode comprising the positive electrode active material and a lithium-ion secondary battery made using the positive electrode. The sulfur-based positive electrode active material is obtainable by subjecting a starting material comprising a polymer, sulfur and an organometallic compound dispersed in a form of fine particles to heat-treatment under a non-oxidizing atmosphere, wherein the particles of metallic sulfide resulting from sulfurization of the organometallic compound are dispersed in the heat-treated material, and particle size of the metallic sulfide particles is not less than 10 nm and less than 100 nm.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: June 18, 2019
    Assignee: SUMITOMO RUBBER INDUSTRIES, LTD.
    Inventors: Tatsuya Kubo, Akihiro Yamano, Naoto Yamashita, Masahiro Yanagida
  • Publication number: 20190148734
    Abstract: An object of the present invention is to provide a lithium-ion secondary battery having a large charge and discharge capacity and excellent cycle characteristics irrespective of kind and shape of a current collector. The lithium-ion secondary battery comprises an electrode comprising a primer layer for protecting a current collector and a crosslinking agent layer comprising a compound being capable of crosslinking an aqueous binder contained in the primer layer, the both layers being disposed between a current collector and an active material layer comprising a sulfur-based active material.
    Type: Application
    Filed: October 11, 2018
    Publication date: May 16, 2019
    Applicants: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, SUMITOMO RUBBER INDUSTRIES, LTD.
    Inventors: Naoto YAMASHITA, Takashi MUKAI, Masahiro YANAGIDA, Tatsuya KUBO, Fumiya CHUJO
  • Publication number: 20180213631
    Abstract: There is provided a static electricity removal structure in a low-humidity space, in which static electricity can be removed with high efficiency in the low-humidity space by using a static electricity removal device. A low-humidity space is configured such that dehumidified air is supplied from one side of the low-humidity space into the low-humidity space through a blowout surface material in which ventilation pore is formed, and exhausting is performed from the other side of the low-humidity space, which opposes the blowout surface material. A static electricity removal device is disposed on a downstream side of the blowout surface material.
    Type: Application
    Filed: March 26, 2018
    Publication date: July 26, 2018
    Inventors: Taichi Sakamoto, Takashi Mukai, Yuta Ikeuchi, Masahiro Yanagida, Keiji Izumi, Teppei Taniguchi
  • Publication number: 20180183047
    Abstract: Provided is a method for manufacturing a slurry for a positive electrode of a nonaqueous electrolyte secondary battery containing an alkali metal complex oxide, the method making it possible to reliably deaerate surplus carbonic acid gas after an alkali component of a slurry containing the alkali metal complex oxide is neutralized within a short period of time. The method for manufacturing a slurry for a positive electrode of a nonaqueous electrolyte secondary battery includes a step of manufacturing an electrode slurry including a step of performing a neutralization treatment on an alkali component in the slurry by using inorganic carbon dissolved in a solvent of the slurry and a step of deaerating the inorganic carbon in the slurry as carbonic acid gas by causing cavitation.
    Type: Application
    Filed: February 20, 2018
    Publication date: June 28, 2018
    Inventors: Taichi Sakamoto, Takashi Mukai, Yuta Ikeuchi, Naoto Yamashita, Masahiro Yanagida, Keiichi Asami, Keiichiro Onishi
  • Publication number: 20180114975
    Abstract: A lithium ion battery negative electrode is used in a lithium ion battery. In the electrode, a negative electrode active material which is a Si alloy composed of a eutectic structure of a Si phase and a Si2Ti phase and another negative electrode active material layer containing a binder having a three-dimensional structure are formed on a negative electrode current collector.
    Type: Application
    Filed: February 1, 2016
    Publication date: April 26, 2018
    Inventors: Masahiro YANAGIDA, Hideaki TANAKA, Tetsuo SAKAI, Masanori MORISHITA, Toru KAWAI
  • Publication number: 20170338511
    Abstract: Provided is a lithium ion battery whose manufacturing process is simple and which has high energy density and heat resistance.
    Type: Application
    Filed: October 19, 2015
    Publication date: November 23, 2017
    Inventors: Akihiro YAMANO, Tetsuo SAKAI, Masahiro YANAGIDA, Masanori MORISHITA, Masashi HIGUCHI
  • Publication number: 20170288225
    Abstract: An object of the present invention is to provide a novel sulfur-based positive electrode active material for a lithium-ion secondary battery which is excellent in cyclability and can largely improve a charging and discharging capacity, a positive electrode comprising the positive electrode active material and a lithium-ion secondary battery made using the positive electrode. The sulfur-based positive electrode active material is obtainable by subjecting a starting material comprising a polymer, sulfur and an organometallic compound dispersed in a form of fine particles to heat-treatment under a non-oxidizing atmosphere, wherein the particles of metallic sulfide resulting from sulfurization of the organometallic compound are dispersed in the heat-treated material, and particle size of the metallic sulfide particles is not less than 10 nm and less than 100 nm.
    Type: Application
    Filed: March 6, 2017
    Publication date: October 5, 2017
    Applicants: SUMITOMO RUBBER INDUSTRIES, LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Tatsuya KUBO, Akihiro YAMANO, Naoto YAMASHITA, Masahiro YANAGIDA
  • Publication number: 20170149063
    Abstract: An object of the present invention is to provide a novel positive electrode which is produced using a rubber being an inexpensive material and is capable of enhancing a charge and discharge capacity and cyclability of a lithium-ion secondary battery, and the lithium-ion secondary battery composed of the positive electrode. In the lithium-ion secondary battery, the positive electrode comprises a current collector and an electrode layer formed on a surface of the current collector, the electrode layer comprises an active material, an electrically-conductive additive and a thermosetting resin binder subjected to thermosetting, and the active material comprises a sulfur-based positive-electrode active material prepared by heat-treating a starting material comprising a rubber and sulfur under a non-oxidizing atmosphere.
    Type: Application
    Filed: October 20, 2016
    Publication date: May 25, 2017
    Applicants: SUMITOMO RUBBER INDUSTRIES, LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Tatsuya KUBO, Akihiro YAMANO, Naoto YAMASHITA, Toshikatsu KOJIMA, Masahiro YANAGIDA
  • Publication number: 20170117557
    Abstract: A current collector included in a fuel cell, the fuel cell including a membrane electrode assembly including a solid polymer electrolyte layer and a pair of electrode layers formed to sandwich the solid polymer electrolyte layer, the current collector stacked on each electrode layer, and a gas flow path for supply of a gas to each electrode layer, the current collector including a metal porous body which is stacked on the electrode layer, has a flowing gas supplied to the electrode layer, and is rendered conducting to the electrode layer, and the metal porous body including an electrically conductive layer containing electrically conductive particles fixed to a corrosion-resistant and water-repellent resin at least on a side of the electrode layer.
    Type: Application
    Filed: March 19, 2015
    Publication date: April 27, 2017
    Applicants: Sumitomo Electric Industries, Ltd., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Kazuki OKUNO, Takahiro HIGASHINO, Masatoshi MAJIMA, Tsutomu IWAKI, Masahiro YANAGIDA, Tetsuo SAKAI
  • Publication number: 20170062809
    Abstract: An object of the present invention is to provide a novel sulfur-based positive-electrode active material which can largely improve cyclability of a lithium-ion secondary battery, a positive electrode comprising the positive-electrode active material and a lithium-ion secondary battery comprising the positive electrode. The sulfur-based positive-electrode active material is one comprising: a carbon skeleton derived from a polymer composed of a monomer unit having at least one hetero atom-containing moiety, and sulfur incorporated into the carbon skeleton as the carbon skeleton is formed from the polymer by heat treatment.
    Type: Application
    Filed: August 3, 2016
    Publication date: March 2, 2017
    Applicants: SUMITOMO RUBBER INDUSTRIES, LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Tatsuya KUBO, Toshikatsu KOJIMA, Tetsuo SAKAI, Akihiro YAMANO, Masahiro YANAGIDA
  • Patent number: 8819509
    Abstract: An integrated circuit includes a storing unit; and a tester that executes a write and read test on the storing unit based on received test information including a pair of address and data, the tester including: a first retain unit that retains, when a write is made based on the test information, the first write address and the first write data used in the write; a first generator that generates, based on the first write address retained in the first retain unit, a first read address used for reading first read data from the first read address in the storing unit simultaneously with writing second write data to a second write address based on the test information; and a second generator that generates, based on the first write data retained in the first retain unit, an expected value of the first read data.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: August 26, 2014
    Assignee: Fujitsu Limited
    Inventors: Masahiro Yanagida, Hiroyuki Fujimoto
  • Publication number: 20140040686
    Abstract: A method includes: writing testing data to a testing target area of the memory; reading the written data; writing the readout data to a result storage area of the memory with a first data layout; and acquiring a first comparison result by reading the data written to the result storage area and comparing the readout data with check data; rewriting the data read from the testing target area of the memory to the result storage area of the memory while changing a writing destination with a second data layout different from the first data layout within the result storage area of the memory by the testing circuit; and acquiring a second comparison result by reading the rewritten data and comparing the readout data with the check data; and specifying a defective position of the memory in accordance with the first comparison result and the second comparison result.
    Type: Application
    Filed: October 7, 2013
    Publication date: February 6, 2014
    Applicant: FUJITSU LIMITED
    Inventor: MASAHIRO YANAGIDA
  • Publication number: 20130111281
    Abstract: An integrated circuit includes a storing unit; and a tester that executes a write and read test on the storing unit based on received test information including a pair of address and data, the tester including: a first retain unit that retains, when a write is made based on the test information, the first write address and the first write data used in the write; a first generator that generates, based on the first write address retained in the first retain unit, a first read address used for reading first read data from the first read address in the storing unit simultaneously with writing second write data to a second write address based on the test information; and a second generator that generates, based on the first write data retained in the first retain unit, an expected value of the first read data.
    Type: Application
    Filed: August 31, 2012
    Publication date: May 2, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Masahiro Yanagida, Hiroyuki Fujimoto
  • Patent number: 8365027
    Abstract: A processor includes an arithmetic device, a storage device that holds arithmetic data, a data generator that generates test data, an address generator that generates an address at which the test data is to be written, a test data number counter that counts a number of test data, an error information holder that holds mismatch error information, an error occurrence bit position holder that holds a position of a bit at which a mismatch error has occurred, an error occurrence test data number holder that holds number of test data counted by the test data number counter, and a comparator that compares test data written to the storage device with test data read from the storage device and stores error information in the error information holder and a position of a bit and number of the test data in which the mismatch error has occurred.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: January 29, 2013
    Assignee: Fujitsu Limited
    Inventor: Masahiro Yanagida
  • Patent number: 8356217
    Abstract: A storage circuit, an integrated circuit and a scanning method are provided. The storage circuit includes a first storage element, and a second storage element connected to an output of the first storage element. The storage circuit includes a first setting circuit that is configured to set data of a first logic value to the first storage element when a clear signal is applied, and a second setting circuit that is configured to set data of a second logic value to the second storage element and transmit the second logic value data to a different storage circuit when a second clock signal is in an off state and the clear signal is applied.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: January 15, 2013
    Assignee: Fujitsu Limited
    Inventors: Hitoshi Yamanaka, Masahiro Yanagida
  • Publication number: 20100332930
    Abstract: A storage circuit, an integrated circuit and a scanning method are provided. The storage circuit includes a first storage element, and a second storage element connected to an output of the first storage element. The storage circuit includes a first setting circuit that is configured to set data of a first logic value to the first storage element when a clear signal is applied, and a second setting circuit that is configured to set data of a second logic value to the second storage element and transmit the second logic value data to a different storage circuit when a second clock signal is in an off state and the clear signal is applied.
    Type: Application
    Filed: May 25, 2010
    Publication date: December 30, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Hitoshi YAMANAKA, Masahiro YANAGIDA
  • Publication number: 20100138707
    Abstract: A processor includes an arithmetic device, a storage device that holds arithmetic data, a data generator that generates test data, an address generator that generates an address at which the test data is to be written, a test data number counter that counts a number of test data, an error information holder that holds mismatch error information, an error occurrence bit position holder that holds a position of a bit at which a mismatch error has occurred, an error occurrence test data number holder that holds number of test data counted by the test data number counter, and a comparator that compares test data written to the storage device with test data read from the storage device and stores error information in the error information holder and a position of a bit and number of the test data in which the mismatch error has occurred.
    Type: Application
    Filed: December 1, 2009
    Publication date: June 3, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Masahiro Yanagida
  • Patent number: 6460129
    Abstract: A pipeline operation method and a pipeline operation device in which an operation result of an operation unit can be effectively written to a register. In the pipeline operation method and the pipeline operation device, a pipeline operation unit that can perform a pipeline operation, a non-pipeline operation unit that cannot perform a pipeline operation, and a register that is shared by the pipeline operation unit and the non-pipeline operation unit are arranged. To perform an operation while an operation result of each of the pipeline units is being written into the register, translating an instruction to the pipeline operation unit is interlocked when the writing of the operation result of the pipeline operation unit overlaps with the writing of the operation result of the non-pipeline operation unit.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: October 1, 2002
    Assignee: Fujitsu Limited
    Inventors: Shinichi Moriwaki, Masahiro Yanagida, Shuntaro Fujioka, Hidenobu Ohta
  • Patent number: 6352762
    Abstract: An easily adhesive polyamide film has been created from unstretched or uniaxially stretched non-heated polyamide film coated with a water-base coating mixture, whose main constituents are (A) water polyurethane resin containing acetylene glycol in which each carbon atom immediately adjacent to the triple-bonded carbon atom is replaced with a hydroxyl group and a methyl group, and/or an ethylene oxide addition product of the acetylene glycol; (B) a water-soluble polyepoxy compound; and (C) particles with an average diameter between 0.001 and 1.0 &mgr;m, of which the solid-content weight ratio is 98-30/2-70/0.1-10, the coating amount after stretching is between 0.005 and 0.030 g/m2, and the film is stretched in at least one direction and then heated. This newly invented film possesses good blocking resistance and excellent adhesiveness with print ink, laminate, and other coating mixtures, and is especially suitable for boiling sterilization, retort sterilization, and packaging of liquids.
    Type: Grant
    Filed: February 24, 1999
    Date of Patent: March 5, 2002
    Assignee: Kohjin Co., Ltd.
    Inventors: Shinji Shimizu, Masahiro Yanagida, Makio Tominaga, Makoto Ichiki
  • Patent number: 5481489
    Abstract: When processing a binary floating-point number in the IEEE form, whether or not the data is NaN can be discriminated irrespective of a precision thereof. The binary floating-point number having sign, exponent and fraction parts is based on the IEEE form in which the data is defined as NaN on condition that "all values of respective bits of the exponent part are `1`, and all values of respective bits of the fraction part are not `0`". In this binary floating-point number, if a precision of the binary floating-point is the maximum precision, the data is set intactly as internal representation form data. If the precision is less than the maximum precision, the following transform is executed. The sign part is set as it is. The exponent part is extended to a number of bits of the exponent part of the maximum precision, and deficient bits due to this extension are filled with `1`.
    Type: Grant
    Filed: June 17, 1994
    Date of Patent: January 2, 1996
    Assignee: Fujitsu Limited
    Inventors: Masahiro Yanagida, Hiromasa Takahashi, Osamu Tachibana