Masahiro Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
Abstract: A sensor has an image sensing unit including pixel blocks, and a readout unit for reading out a signal from the image sensing unit. The pixel block includes a photoelectric converter, first and second transistors, and a current source. First main electrodes of the first and second transistors are connected to a common node, and the current source is provided between the common node and a predetermined voltage. A signal readout operation includes an operation in which a voltage corresponding to charges in the photoelectric converter is supplied to a control electrode of the first transistor, and a temporally changing reference voltage is supplied to a control electrode of the second transistor. The readout unit reads out a signal from the image sensing unit via a second main electrode of the first transistor.
Abstract: A display device includes: display wires; first wires including first end portions overlapped with first end portions of the plurality of display wires via an insulating film; second wires including first end portions overlapped with second end portions of the display wires via the insulating film; third wires routed from second end portions of the first wires to second end portions of the second wires; a fourth wire overlapping with the second end portions of the first wires and first end portions of the third wires via the insulating film; and a fifth wire overlapping with the second end portions of the second wires and second end portions of the third wire via the insulating film.
Abstract: A semiconductor device is provided that operates at improved write speeds without an increase in area. The semiconductor device according to the invention includes a plurality of memory cells arranged in a matrix of rows and columns, a plurality of word lines provided to each row of the memory cells, a plurality of bit line pairs provided to each column of the memory cells, sense amplifiers that amplify the potential difference in the bit line pairs, data line pairs that transfer data to the bit line pairs, column selection circuits that permit receiving the data from the data line pairs, a column decoder that transmits column selection signals to the column selection circuits, and a sense amplifier control circuit that activates the sense amplifiers after the column decoder transmits the column selection signals to the column selection circuits.
Abstract: Fourier transform is performed on a reception signal to obtain a first calculation value. Fourier transform is performed on a known signal to obtain a second calculation value. The first calculation value is divided by the second calculation value to obtain a third calculation value. Inverse Fourier transform is performed on the third calculation value to obtain a fourth calculation value. A maximum value of an amplitude of the fourth calculation value and a sample point at which the maximum value is obtained are detected. The position of the known signal in the reception signal is detected from the sample point at which the maximum value is obtained.
Abstract: An FIR filter convolutes sampled data obtained by sampling a reception signal with tap coefficients. A phase difference detector detects a phase difference between a synchronization timing of a signal waveform estimated from an output signal of the FIR filter and a sampling timing of the output signal. A tap coefficient adjuster adjusts the tap coefficients so as to reduce the phase difference detected by the phase difference detector and causes the sampling timing of the output signal of the FIR filter to track the synchronization timing.
January 16, 2017
Date of Patent:
May 28, 2019
NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Abstract: Before an active program replacement is carried out, a storage controller confirms a communication state between a redundant storage controller having a redundant configuration with the storage controller and the second storage device, and prohibits, in a case where an abnormality is detected in the communication state between the redundant storage controller and the second storage device, the active program replacement of the first storage controller. This inhibits occurrence of system down when active firmware replacement process is to be carried out in a storage system including multiple storage devices connected to one another.
Abstract: A personal information anonymization method is disclosed. Each of a plurality of data including personal information is classified into any one of a plurality of groups based on a degree of commonality of the personal information. An anonymization process, that standardizes the personal information of each of data belonging to each of the groups, is performed for each of the groups. A total number of the data belonging to each of the groups is calculated for each of the groups. The plurality of the groups are classified based on the total number of the sets of the data. A classification result is output.
July 20, 2016
Date of Patent:
May 14, 2019
Masahiro Hamamoto, Shinji Matsune, Takao Yoshida
Abstract: According to one embodiment, a display device comprises a plurality of pixel circuits arrayed two-dimensionally. Each of the pixel circuits comprises a display element and a pixel memory configured to store a signal to drive the display element. An X-directional driver and a Y-directional driver can select arbitrary pixel circuits and drive the pixel circuits. A touch panel controller converts a sensing output of a touch-type input panel to coordinate data. A display controller receives the coordinate data and partially rewrites the coordinate data in units of pixel circuits of the display device via the X-directional driver and the Y-directional driver.
Abstract: A display device with a position input function includes pixel electrodes arranged at interval, a position detection wire disposed between the adjacent pixel electrodes and included in a layer different from a layer of the pixel electrodes, a position detection electrode forming a capacitance between the position detection electrode and a positional input body to detect an input position and included in a same layer as the position detection wire and connected to the position detection wire, the position detection electrode overlapping the pixel electrodes and divided into divided position detection electrodes by the position detection wire, and a connection part included in a layer different from the layer of the position detection electrode and the position detection wire while having an insulation film therebetween, the connection part including a portion overlapping a portion of each divided position detection electrode and connected to the divided position detection electrodes.
Abstract: A display device includes a signal supply part, a substrate including a display region and a second region having a width increase section, a display line on the display region and through which a signal for display is transmitted, a line on the first region and through which a signal is transmitted, a signal receive part on the second region, a display lead line connected to the signal supply part and an end of the display line close to the signal supply part, a first lead line connected to the signal supply part and an end of the line close to the signal supply part, and a second lead line connected to the signal receive part and another end of the line opposite from the end of the line close to the signal supply part.
Abstract: A display device with a position inputting function includes pixel electrodes, signal wiring, position detection electrodes, a position detection wiring, conductive structural objects, bridging wirings, and an insulating film. The signal wirings are disposed to sandwich the pixel electrodes. The position detection wiring includes at least first wiring portions and second wiring portions. The first wiring portions are sandwiched between the pixel electrodes and the signal wirings. Pairs of the first wiring portions are linearly disposed in an arrangement direction in which the pixel electrodes are disposed. The second wiring portions connect ends of the first wiring portions adjacent to each other in the arrangement direction. The bridging wirings are disposed to cross the conductive structural objects. The bridging wirings include sections connected to ends of the first wiring portions adjacent to each other in the arrangement direction on the same side through contact holes in the insulating film.
Abstract: A display device with a position inputting function includes pixel electrodes, signal wirings, position detection electrodes, and a position detection wiring. The signal wirings are configured to transmit signals supplied to the pixel electrode and disposed to sandwich the pixel electrodes. The position detection electrodes are each configured to form capacitors between the position detection electrodes and a position input member and to detect a position of input by the position input member. The position detection wiring includes at least first wiring portions and a second wiring portion. The first wiring portions are each sandwiched between the pixel electrodes and the signal wirings. The second wiring portion bridges the first wiring portions.
Abstract: In the present liquid crystal display device, a conventional first auxiliary capacitance trunk line 430 is formed to be narrow, and a second auxiliary capacitance trunk line 440 is additionally provided and disposed at the closest position to the periphery of a substrate. Thus, a shift register can be distanced from the periphery of the substrate without increasing a frame area as a whole, so that the shift register is not overlaid with a seal material. Moreover, the extent of an area overlaid with a seal material within a wiring area for providing signals to the shift register can be reduced.
Abstract: A liquid crystal display panel (100) according to the present invention includes a plurality of spacers configured to hold a gap between a first substrate (10) and a second substrate (30). The plurality of spacers include a plurality of first spacers in a display region and a plurality of second spacers (55) in a non-display region. The first substrate includes a first metal layer (12) and a second metal layer (16), a first transparent conductive layer (22) formed on the second metal layer and in direct contact with the second metal layer, a second inorganic insulating layer (23) formed on the first transparent conductive layer, and an organic insulating layer (25) formed on the second inorganic insulating layer. When viewed from the normal direction of the first substrate, each of the plurality of spacers overlaps with the first transparent conductive layer and the second inorganic insulating layer, and overlaps with the first metal layer and/or the second metal layer.
Abstract: While a molten metal obtained by melting silver and a metal, which is selected from the group consisting of tin, zinc, lead and indium, in an atmosphere of nitrogen is allowed to drop, a high-pressure water (preferably pure water or alkaline water) is sprayed onto the molten metal in the atmosphere or an atmosphere of nitrogen to rapidly cool and solidify the molten metal to produce a silver alloy powder which comprises silver and the metal which is selected from the group consisting of tin, zinc, lead and indium and which has an average particle diameter of 0.5 to 20 ?m, the silver alloy powder having a temperature of not higher than 300° C. at a shrinking percentage of 0.5%, a temperature of not higher than 400° C. at a shrinking percentage of 1.0% and a temperature of not higher than 450° C. at a shrinking percentage of 1.5% in a thermomechanical analysis.
Abstract: A liquid crystal display panel includes: a first substrate; a second substrate; a liquid crystal layer provided between the first substrate and the second substrate; and a plurality of spacers configured to hold a gap between the first substrate and the second substrate. The first substrate includes: a plurality of TFTs; a plurality of first wiring lines including part of a first metal layer; a plurality of second wiring lines including part of a second metal layer; an inorganic insulating layer formed on the second metal layer; a first transparent conductive layer formed below the inorganic insulating layer; a second transparent conductive layer formed on the inorganic insulating layer; and an organic insulating layer formed on the inorganic insulating layer. Each of the plurality of spacers overlaps with at least one of a source electrode and a drain electrode of a corresponding one of the plurality of TFTs, and each of the plurality of spacers includes a part of the organic insulating layer.
Abstract: A variable-speed pumped storage power generation apparatus sets a maximum change rate of a power output command constant when a slip frequency is within a normal operating range, limits the maximum change rate of the power output command by multiplying the maximum change rate by a value in a range of one to zero when the slip frequency is within a range falling below a lower limit of the normal operating range by a predetermined value or less or within a range exceeding an upper limit of the normal operating range by a predetermined value or less, and limits the maximum change rate of the power output command by multiplying the maximum change rate by zero when the slip frequency is in a range falling below the lower limit by the predetermined value or more or in a range exceeding the upper limit by the predetermined value or more.
Abstract: In a control program for one storage control device in a storage device that includes a plurality of storage control devices that control storages and in which configuration information related to configurations of the storages is synchronized among the storage control devices, a process includes; storing, when having received a command to change the configuration information while another storage control device is executing update processing of updating a firmware, specification information specifying a plurality of divided pieces of command processing obtained by dividing processing of the command into executable units in a storage region; and executing each of the divided pieces of the command processing specified by the specification information while the other storage control device is executing any divided piece of the update processing, executable in parallel with the processing of the command.
Abstract: A gaming machine which makes it possible to improve monotonous game play is provided. A gaming machine includes: a display device configured to display a game result by rearranging symbols arranged on video reels; a storage device configured to store a normal mode video reel on which the symbols including a predetermined symbol are arranged and a chance mode video reel on which the number of the predetermined symbol is larger than the number of the predetermined symbol on the normal mode video reel; and a controller configured to perform switching between a game in a normal mode using the normal mode video reel and a game in a chance mode using the chance mode video reel, when a predetermined condition is satisfied.
September 23, 2016
Date of Patent:
November 20, 2018
UNIVERSAL ENTERTAINMENT CORPORATION, ARUZE GAMING (HONG KONG) LIMITED
Abstract: There is provided a silver powder which has a small average particle diameter and a small thermal shrinkage percentage, and a method for producing the same. While a molten metal of silver heated to a temperature (1292 to 1692° C.), which is higher than the melting point (962° C.) of silver by 330 to 730° C., is allowed to drop, a high-pressure water is sprayed onto the molten metal of silver (preferably at a water pressure of 90 to 160 MPa) to rapidly cool and solidify the molten metal of silver to powderize silver to produce a silver powder which has an average particle diameter of 1 to 6 ?m and a shrinkage percentage of not greater than 8% (preferably not greater than 7%) at 500° C., the product of the average particle diameter by the shrinkage percentage at 500° C. being 1 to 11 ?m·% (preferably 1.5 to 10.5 ?m·%).