Patents by Inventor Masahisa Ikeya

Masahisa Ikeya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6919541
    Abstract: An apparatus for fabricating a semiconductor device, whereby a semiconductor wafer is thermally treated with a wafer treatment device. The semiconductor wafer is delivered with a conveyer to the wafer treatment device. The temperature of the conveyer is controlled to have an optimum temperature by an arm heater and an arm cooler.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: July 19, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Masahisa Ikeya
  • Patent number: 6867120
    Abstract: In a semiconductor device, particles are removed from the surface of a gold conductive layer before an intermediate insulating layer of an amino silane compound is formed. An organic insulating layer is formed on the intermediate insulating layer. As a result, adhesion strength between the conductive layer and the intermediate insulating layer can be improved.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: March 15, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Takehiko Okajima, Masahisa Ikeya
  • Publication number: 20040018744
    Abstract: Particles are removed from a surface of a gold conductive layer before forming an intermediate insulating layer of an amino silane compound.
    Type: Application
    Filed: January 29, 2003
    Publication date: January 29, 2004
    Inventors: Takehiko Okajima, Masahisa Ikeya
  • Publication number: 20020119679
    Abstract: In a method for fabricating a semiconductor device, a semiconductor wafer is thermally treated with a wafer treatment device. The semiconductor wafer is delivered with a conveyer to the wafer treatment device. The temperature of the conveyer is controlled to have an optimum temperature.
    Type: Application
    Filed: May 1, 2002
    Publication date: August 29, 2002
    Inventor: Masahisa Ikeya
  • Patent number: 6440846
    Abstract: In a method for forming a semiconductor device, when polishing the wafer, the photo-resin so as to cure with ultraviolet is buried. Then, after polishing and forming the back side electrode, the photo-resin is removed by organic solvent. Accordingly, the method can improve reliability of bonding and simplify process flow without decreasing electrical characteristics.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: August 27, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Masahisa Ikeya
  • Patent number: 6423559
    Abstract: A method of fabricating an integrated circuit of which a bonding condition can be evaluated simply is provided. Two external connecting electrodes are provided on the surface, via holes are formed below them, and conductive portions are formed in the via holes. Then, a first metal film is formed on a rear face of a chip and a second metal film is formed on a surface of a ceramic substrate, and then both of them are made contact and heated so as to bond the chip and the ceramic substrate. Further, when the first metal film is formed, a slit portion which no first metal film exists is provided. When the bonding condition is evaluated, a resistance between two external connecting electrodes is measured.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: July 23, 2002
    Assignee: Oki Electric Industry Co.
    Inventors: Masahisa Ikeya, Kazuyuki Inokuchi
  • Patent number: 6413888
    Abstract: In a method for fabricating a semiconductor device, a semiconductor wafer is thermally treated with a wafer treatment device, such as in a diffustion process. The semiconductor wafer is deliverd to the treatment device using a conveyor system. The conveyor system is operated in an arrangement consisting of at least two connected armatures and is operated with both heating and cooling elements. The heating and cooling element are implemented for optimal temperture control of the connected conveyor arms with respect to increase throughout while avoiding thermal shock.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: July 2, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Masahisa Ikeya
  • Publication number: 20010007356
    Abstract: A method of fabricating an integrated circuit of which a bonding condition can be evaluated simply is provided. Two external connecting electrodes are provided on the surface, via holes are formed below them, and conductive portions are formed in the via holes. Then, a first metal film is formed on a rear face of a chip and a second metal film is formed on a surface of a ceramic substrate, and then both of them are made contact and heated so as to bond the chip and the ceramic substrate. Further, when the first metal film is formed, a slit portion which no first metal film exists is provided. When the bonding condition is evaluated, a resistance between two external connecting electrodes is measured.
    Type: Application
    Filed: December 13, 2000
    Publication date: July 12, 2001
    Inventors: Masahisa Ikeya, Kazuyuki Inokuchi
  • Patent number: 6251696
    Abstract: A method of fabricating an integrated circuit of which a bonding condition can be evaluated simply is provided. Two external connecting electrodes are provided on the surface, via holes are formed below them, and conductive portions are formed in the via holes. Then, a first metal film is formed on a rear face of a chip and a second metal film is formed on a surface of a ceramic substrate, and then both of them are made contact and heated so as to bond the chip and the ceramic substrate. Further, when the first metal film is formed, a slit portion which no first metal film exists is provided. When the bonding condition is evaluated, a resistance between two external connecting electrodes is measured.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: June 26, 2001
    Assignee: Oki Electric Industry, Co. Ltd.
    Inventors: Masahisa Ikeya, Kazuyuki Inokuchi
  • Patent number: 5994716
    Abstract: A method of fabricating an integrated circuit of which a bonding condition can be evaluated simply is provided. Two external connecting electrodes are provided on the surface, via holes are formed below them, and conductive portions are formed in the via holes. Then, a first metal film is formed on a rear face of a chip and a second metal film is formed on a surface of a ceramic substrate, and then both of them are made contact and heated so as to bond the chip and the ceramic substrate. Further, when the first metal film is formed, a slit portion which no first metal film exists is provided. When the bonding condition is evaluated, a resistance between two external connecting electrodes is measured.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: November 30, 1999
    Assignee: Oki Electric Industry, Co. Ltd.
    Inventors: Masahisa Ikeya, Kazuyuki Inokuchi
  • Patent number: 5412236
    Abstract: In a method of making a semiconductor device, an active layer and a heavily doped cap layer are formed in turn on a semiconductor substrate, a first electrode is formed on the cap layer, a mask of a two-layer structure is formed on the cap layer, with the mask having an insulating film pattern having a non-inverted tapered opening, and a resist pattern having an inverted tapered opening and continuous with the non-inverted tapered opening, these openings being separated by a predetermined distance from the first electrode, and then a recess is formed, by performing an isotropic etching of the heavily doped layer exposed in the openings, with the recess having a bottom surface and a side wall surface rising from an edge of the bottom surface toward the upper edge with a constant radium off curvature. An oblique vapor deposition is then performed to form a second electrode to cover the bottom surface and the part of the side wall surface.
    Type: Grant
    Filed: April 20, 1994
    Date of Patent: May 2, 1995
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Masahisa Ikeya, Tadashi Saito, Kazuyuki Inokuchi