Abstract: An electrostatic protection circuit includes a first transistor connected to an external terminal, a second transistor that is connected in series to the first transistor and that is in a normally OFF state. The electrostatic protection circuit includes a third transistor that is connected between a power source line and a gate of the first transistor, and a fourth transistor that is connected between the power source line and the gate of the first transistor in the opposite direction to the third transistor.

Abstract: An electrostatic protection circuit includes a first transistor connected to an external terminal, a second transistor that is connected in series to the first transistor and that is in a normally OFF state. The electrostatic protection circuit includes a third transistor that is connected between a power source line and a gate of the first transistor, and a fourth transistor that is connected between the power source line and the gate of the first transistor in the opposite direction to the third transistor.

Abstract: An electrostatic protection circuit includes a first transistor connected to an external terminal, a second transistor that is connected in series to the first transistor and that is in a normally OFF state. The electrostatic protection circuit includes a third transistor that is connected between a power source line and a gate of the first transistor, and a fourth transistor that is connected between the power source line and the gate of the first transistor in the opposite direction to the third transistor.

Abstract: An electrostatic protection circuit includes a first transistor connected to an external terminal, a second transistor that is connected in series to the first transistor and that is in a normally OFF state. The electrostatic protection circuit includes a third transistor that is connected between a power source line and a gate of the first transistor, and a fourth transistor that is connected between the power source line and the gate of the first transistor in the opposite direction to the third transistor.

Abstract: An ESD protection circuit including a first electrostatic discharge protection circuit provided between first power supply wiring and first ground wiring; a second ESD protection circuit provided between second power supply wiring and second ground wiring; a third ESD protection circuit provided between the first ground wiring and the second ground wiring; a PMOS transistor coupled to the first power supply wiring and provided between a first CMOS circuit coupled to the first ground wiring and the first power supply wiring, the first CMOS circuit receiving a signal from a first internal circuit and outputting a signal to a first node; an NMOS transistor provided between the first node and the first ground wiring; and an ESD detection circuit that renders the PMOS transistor conductive and the NMOS transistor non-conductive during normal operation, and renders the PMOS transistor non-conductive and the NMOS transistor conductive when an ESD is applied.

Abstract: An ESD protection circuit including a first electrostatic discharge protection circuit provided between first power supply wiring and first ground wiring; a second ESD protection circuit provided between second power supply wiring and second ground wiring; a third ESD protection circuit provided between the first ground wiring and the second ground wiring; a PMOS transistor coupled to the first power supply wiring and provided between a first CMOS circuit coupled to the first ground wiring and the first power supply wiring, the first CMOS circuit receiving a signal from a first internal circuit and outputting a signal to a first node; an NMOS transistor provided between the first node and the first ground wiring; and an ESD detection circuit that renders the PMOS transistor conductive and the NMOS transistor non-conductive during normal operation, and renders the PMOS transistor non-conductive and the NMOS transistor conductive when an ESD is applied.

Abstract: An electrostatic protection circuit having an external power supply terminal, an external ground terminal, a first external signal terminal, a first p-type field-effect transistor having a source and a drain respectively connected to the external power supply terminal and the first external signal terminal, a first n-type field-effect transistor having a source and a drain respectively connected to the external ground terminal and the first external signal terminal, and an electrostatic detection circuit is provided. The electrostatic detection circuit turns off the first p-type field-effect transistor and the first n-type field-effect transistor when it does not detect static electricity, and the electrostatic detection circuit turns on the first p-type field-effect transistor and the first n-type field-effect transistor when it detects static electricity.