Patents by Inventor Masakatsu Goto

Masakatsu Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8735222
    Abstract: In regard to a semiconductor device having a multilayered wiring board where a semiconductor chip is embedded inside, a technology which allows the multilayered wiring board to be made thinner is provided. A feature of the present invention is that, in a semiconductor device where bump electrodes are formed over a main surface (element forming surface) of a semiconductor chip embedded in a chip-embedded wiring board, an insulating film is formed over a back surface (a surface on the side opposite to the main surface) of the semiconductor chip. As a result, it becomes unnecessary to form a prepreg over the back surface of the semiconductor chip. Therefore, an effect of thinning the chip-embedded wiring board in which the semiconductor chip is embedded is obtained.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: May 27, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Masakatsu Goto, Minoru Enomoto
  • Patent number: 8377752
    Abstract: In regard to a semiconductor device having a multilayered wiring board where a semiconductor chip is embedded inside, a technology which allows the multilayered wiring board to be made thinner is provided. A feature of the present invention is that, in a semiconductor device where bump electrodes are formed over a main surface (element forming surface) of a semiconductor chip embedded in a chip-embedded wiring board, an insulating film is formed over a back surface (a surface on the side opposite to the main surface) of the semiconductor chip. As a result, it becomes unnecessary to form a prepreg over the back surface of the semiconductor chip. Therefore, an effect of thinning the chip-embedded wiring board in which the semiconductor chip is embedded is obtained.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: February 19, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Masakatsu Goto, Minoru Enomoto
  • Patent number: 8035979
    Abstract: A printed wiring board includes a built-in semiconductor element. A protective film is formed on a semiconductor element-mounted surface of a base substrate to which the built-in semiconductor element is connected to protect the semiconductor element-mounted surface excepting a mounting pad. Upper and side surfaces of the built-in semiconductor element are covered with a first insulating film formed by filling a sealing material. The first insulating film is covered with a second insulating film formed of an insulating resin melted from an insulating layer that is provided in side and upper portions of the built-in semiconductor element.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: October 11, 2011
    Assignees: CMK Corporation, Renesas Eastern Japan Semiconductor, Inc.
    Inventors: Yutaka Yoshino, Takahiro Shirai, Shinji Kadono, Mineo Kawamoto, Minoru Enomoto, Masakatsu Goto, Makoto Araki, Naoki Toda
  • Publication number: 20110193203
    Abstract: In regard to a semiconductor device having a multilayered wiring board where a semiconductor chip is embedded inside, a technology which allows the multilayered wiring board to be made thinner is provided. A feature of the present invention is that, in a semiconductor device where bump electrodes are formed over a main surface (element forming surface) of a semiconductor chip embedded in a chip-embedded wiring board, an insulating film is formed over a back surface (a surface on the side opposite to the main surface) of the semiconductor chip. As a result, it becomes unnecessary to form a prepreg over the back surface of the semiconductor chip. Therefore, an effect of thinning the chip-embedded wiring board in which the semiconductor chip is embedded is obtained.
    Type: Application
    Filed: February 2, 2011
    Publication date: August 11, 2011
    Inventors: Masakatsu GOTO, Minoru Enomoto
  • Publication number: 20110090657
    Abstract: A printed wiring board includes a built-in semiconductor element. A protective film is formed on a semiconductor element-mounted surface of a base substrate to which the built-in semiconductor element is connected to protect the semiconductor element-mounted surface excepting a mounting pad. Upper and side surfaces of the built-in semiconductor element are covered with a first insulating film formed by filling a sealing material. The first insulating film is covered with a second insulating film formed of an insulating resin melted from an insulating layer that is provided in side and upper portions of the built-in semiconductor element.
    Type: Application
    Filed: December 13, 2010
    Publication date: April 21, 2011
    Applicants: CMK CORPORATION, RENESAS EASTERN JAPAN SEMICONDUCTOR INC.
    Inventors: Yutaka YOSHINO, Takahiro Shirai, Shinji Kadono, Mineo Kawamoto, Minoru Enomoto, Masakatsu Goto, Makoto Araki, Naoki Toda
  • Patent number: 7894200
    Abstract: The present invention provides a printed wiring board with a built-in semiconductor element in which an insufficient or excessive amount of filled sealing material does not affect excellent adhesion of the printed wiring board to an overlying wiring board. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, the upper surface, or the side surface of the semiconductor element is covered with an insulating film, and an insulating layer is provided in the side and upper portions of the semiconductor element.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: February 22, 2011
    Assignees: CMK Corporation, Renesas Eastern Japan Semiconductor, Inc.
    Inventors: Yutaka Yoshino, Takahiro Shirai, Shinji Kadono, Mineo Kawamoto, Minoru Enomoto, Masakatsu Goto, Makoto Araki, Naoki Toda
  • Publication number: 20070096287
    Abstract: Packaging performance of a semiconductor device is improved. A semiconductor device has a package substrate having a base material formed of resin; a semiconductor chip mounted on a main surface of the package substrate; a tape substrates being stacked on the package substrate in several stages, and electrically connected to a substrate at a lower stage via a plurality of solder balls; a second-stage chip, third-stage chip, and fourth-stage chip mounted on the tape substrates at respective stages; and a plurality of solder balls provided on a back surface of the package substrate; wherein a sealing body, which resin-seals the semiconductor chip and is formed by resin molding, is formed on a main surface of a package substrate disposed at the lowest stage, and the sealing body is disposed between the package substrate at the lowest stage and the tape substrate stacked thereon.
    Type: Application
    Filed: October 18, 2006
    Publication date: May 3, 2007
    Inventors: Makoto Araki, Masakatsu Goto, Shigeru Nakamura
  • Patent number: 5910010
    Abstract: A method of manufacturing a semiconductor integrated circuit device includes the steps of constructing a plurality of lead frames having leads which each include an inner portion and an outer portion and electrically connecting a semiconductor chip to the inner portions of the leads of each frame. The lead frames are then stacked one above each other to form a vertical stack and plates are then inserted between each of the lead frames with each plate having an opening in the center whereby a central cavity is formed in the stack. The stack is then placed between a top mold member and a bottom mold member and a resin is injected into the central cavity whereupon the resin is cured to form a single resin package encapsulating the semiconductor chips. The resin package is then released from the mold members.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: June 8, 1999
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp., Hitachi Tohbu Semiconductor, Ltd., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Hirotaka Nishizawa, Tomoyoshi Miura, Ichirou Anjou, Masamichi Ishihara, Masahiro Yamamura, Sadao Morita, Takashi Araki, Kiyoshi Inoue, Toshio Sugano, Tetsuji Kohara, Toshio Yamada, Yasushi Sekine, Yoshiaki Anata, Masakatsu Goto, Norihiko Kasai, Shinobu Takeura, Mutsuo Tsukuda, Yasunori Yamaguchi, Jiro Sawada, Hidetoshi Iwai, Seiichiro Tsukui, Tadao Kaji, Noboru Shiozawa