Abstract: The present invention provides a wide bandgap semiconductor device encompassing: (a) a drift layer of a first conductivity type made of a wide bandgap semiconductor material; (b) a body region of a second conductivity type made of the wide bandgap semiconductor material, disposed at the top surface of and in the drift layer; (c) a source region of the first conductivity type disposed in the body region; (d) a channel layer of the first conductivity type, disposed in the body region neighboring to the source region and further disposed in the drift layer; and (e) a gate electrode including semiconductor layer at the bottom so that the semiconductor layer directly contact with the top surface of the channel layer, the semiconductor layer made of a semiconductor material having a different bandgap energy from that of the wide bandgap semiconductor material.

Abstract: There is provided a power MOSFET in which a plurality of base regions are formed on a surface of a semiconductor region serving as a drain region, convex drain regions are formed on the semiconductor region, and a part of the convex drain regions is formed of wide bandgap semiconductor having a bandgap wider than that of the semiconductor region. The wide bandgap semiconductor is connected to the drain electrodes and a part of the convex drain regions has a structure sandwiched by gate electrodes. If the semiconductor region is formed of silicon, silicon carbide (SiC) is representatively preferable material as the wide bandgap semiconductor.

Abstract: A semiconductor structure having a plurality of drivers in and on the same semiconductor substrate is arranged to increase the density of integrated components and reduce the on resistance. The semiconductor structure employs a double layer interconnection structure having source and drain electrodes at two different levels, and an insulated gate electrode in a groove formed the semiconductor substrate. Each drain lead region having a low resistivity material extends from the upper surface of the substrate to a low resistivity buried layer. Each drain opening is surrounded by a source zone formed with a series of source holes or a long and narrow source slot, and this basic pattern is regularly repeated in a plane.

Abstract: A semiconductor device having a surge input detecting circuit is provided with the driving circuit for, for example, reversible motor. To prevent MOS power transistors constituting the power driving circuit from their destructive breakdowns (failures), when the surge input detecting circuit block detects the surge voltage input through the driving circuit which exceeds a predetermined voltage, namely, a maximum rated power supply voltage of the power driving circuit, the surge input detecting circuit outputs the signal to turn the MOS power transistors in off-states. These circuit elements are integrally mounted on a semiconductor chip. The surge input detecting circuit block detects such a surge input through a power supply terminal in terms of either of its voltage, its current, or the temperature rise in the semiconductor chip. The breakdown voltage per power transistor can be half the maximum rated power supply voltage.

Abstract: A lateral double-diffused MOSFET has a semiconductor substrate, a drain region formed on the substrate, a gate insulation film formed on the drain region, a gate electrode formed on the gate insulation film, source and drain openings formed through the gate electrode, a first conductive region formed under the drain region, a source electrode formed on the source openings, a drain electrode formed on the drain openings, and second conductive regions for connecting the drain electrode to the first conductive region. The source and drain openings are cyclically arranged so that at least two rows of source openings are arranged between adjacent drain openings, to reduce the ON resistance of the MOSFET.

Abstract: A lateral DMOS FET device which has a small on resistance. The device includes a cell structure formed by a plurality of unit cells, each unit cell including: a source region of first conduction type formed on one side of a substrate of first conduction type; a channel region of second conduction type formed around the source region; and a plurality of drain contact regions of first conduction type located around the channel region; and a source electrode, a gate electrode, and a drain electrode, all of which are formed on the same one side of the substrate. Alternatively, each unit cell may includes: a drain contact region of first conduction type formed on one side of a substrate of first conduction type; a channel region of second conduction type formed around the drain contact region; and a plurality of source regions of first conduction type located around the channel region.

Abstract: A semiconductor device in which the breakdown voltages of the cell unit and the guard ring can easily be matched, and the surge endurance of the device can be improved. This semiconductor device includes a guard ring region surrounding the cell diffusion layers which is formed from an array of a plurality of guard ring cells, where each of the guard ring cells is identical to each of the cell diffusion layers and the guard ring cells are electrically connected mutually, so that the diffusion depths of each of the cells of the guard ring region and the cell diffusion layers are identical, and consequently the breakdown voltages for the guard ring region and the cell diffusion layers can be made equal to each other.

Abstract: A lateral DMOSFET device with a small on resistance and a small device area.