Patents by Inventor Masakatsu Tominaga

Masakatsu Tominaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190196638
    Abstract: Provided is an active matrix substrate in which parasitic capacitance can be reduced and the display quality can be improved is provided, a touch-panel-equipped display device including the same, and a liquid crystal display device including the same. An active matrix substrate 1 includes a plurality of pixel electrodes 31; a plurality of counter electrodes provided so as to be opposed to the pixel electrodes 31, respectively, capacitors being formed between the counter electrodes 21 and the pixel electrodes 31; a conductive layer provided on a side opposite to the counter electrodes 21 with respect to the pixel electrodes 31; a first insulating layer 461; and a second insulating layer 462. The first insulating layer 461 is arranged between the pixel electrodes 31 and the conductive layer, and the second insulating layer 462 is arranged between the pixel electrodes 31 and the counter electrodes 21.
    Type: Application
    Filed: June 7, 2017
    Publication date: June 27, 2019
    Inventors: MASAKATSU TOMINAGA, KUNIKO MAENO, SHINGO KAMITANI, YOSHIHITO HARA
  • Patent number: 10330994
    Abstract: A drain electrode 25 of a TFT 21 overlaps with a gate electrode formed integrally with a gate line 23. A pixel electrode 22 has a main body part formed on a first side of the gate line 23, and an extension part extending in an extending direction of a data line 24 and covering an overlapping portion of the gate electrode and the drain electrode 25. The drain electrode 25 is not formed on a second side of the gate line 23, whereas the extension part of the pixel electrode 22 is formed also on the second side of the gate line 23. Even when a position of the pixel electrode 22 is shifted in the extending direction of the data line 24, a parasitic capacitance between a drain and a source of the TFT 21 is kept constant, because an area of a portion where the extension part of the pixel electrode 22 overlaps with the gate line 23 does not change. With this, degradation of display quality due to a variation in the parasitic capacitance between the gate and drain of the TFT 21 can be prevented.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: June 25, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiro Yoshida, Masakatsu Tominaga, Tomoo Furukawa, Junichi Morinaga
  • Publication number: 20190171075
    Abstract: A display device includes: display wires; first wires including first end portions overlapped with first end portions of the plurality of display wires via an insulating film; second wires including first end portions overlapped with second end portions of the display wires via the insulating film; third wires routed from second end portions of the first wires to second end portions of the second wires; a fourth wire overlapping with the second end portions of the first wires and first end portions of the third wires via the insulating film; and a fifth wire overlapping with the second end portions of the second wires and second end portions of the third wire via the insulating film.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 6, 2019
    Inventors: MASAHIRO YOSHIDA, MASAKATSU TOMINAGA
  • Publication number: 20190171321
    Abstract: Provided is a technique that makes it possible to reduce display defects in a touch panel integrated display device. A touch-panel-equipped display device includes an active matrix substrate that includes a plurality of pixels each of which corresponds to any one of N colors (N is a natural number equal to or greater than three). The active matrix substrate includes: a plurality of source lines; a plurality of common electrodes that are used commonly for both of image display and touch position detection; and a plurality of signal lines that are connected with the common electrodes, respectively.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 6, 2019
    Inventor: Masakatsu TOMINAGA
  • Publication number: 20190163024
    Abstract: A liquid crystal panel includes a first substrate, a second substrate, a liquid crystal layer disposed between the first substrate and the second substrate, and a spacer. The first substrate includes pixel electrodes and a common electrode overlapping the pixel electrodes. The second substrate has a display surface displaying an image thereon and is arranged opposite the first substrate and includes a transparent electrode overlapping the common electrode. The spacer has conductivity and is disposed in a display region where the image is displayed and between the first substrate and the second substrate and contacted with the common electrode and the transparent electrode.
    Type: Application
    Filed: November 27, 2018
    Publication date: May 30, 2019
    Inventor: MASAKATSU TOMINAGA
  • Publication number: 20190162996
    Abstract: A liquid crystal panel includes a first substrate, a second substrate, a liquid crystal layer disposed between the first substrate and the second substrate, and a spacer. The first substrate includes pixel electrodes and position detection electrodes and the position detection electrodes detect an input position input with a position inputter based on electrostatic capacitances between the position inputter and the position detection electrodes. The second substrate has a display surface displaying an image thereon and is arranged opposite the first substrate and includes transparent electrodes overlapping the position detection electrodes, respectively. The spacer has conductivity and is disposed in a display region and between the first substrate and the second substrate and is contacted with one of the position detection electrodes and one of the transparent electrodes.
    Type: Application
    Filed: November 13, 2018
    Publication date: May 30, 2019
    Inventor: Masakatsu TOMINAGA
  • Publication number: 20190073968
    Abstract: Provided is a display device in a non-rectangular shape that is capable of reducing display quality deterioration such as defective coloring. The display device includes a display panel having a display area 10R in a non-rectangular shape, and a driving unit 12 that supplies gray level signals to the display panel, the gray level signals indicating gray levels of an image to be displayed in the display area. The display area 10R includes a pixel group in which a plurality of pixels are arrayed, each pixel being composed of subpixels corresponding to at least three different colors, respectively, and a plurality of data lines SL that supply the gray level signals to the subpixels, respectively. In part of the boundary pixels 10Ra, 10Rb in the display area 10R, a display-contributing effective area of the subpixels of at least part of the colors in the boundary pixels is different from an effective area of the subpixels in the non-boundary pixels.
    Type: Application
    Filed: August 29, 2018
    Publication date: March 7, 2019
    Inventor: Masakatsu TOMINAGA
  • Publication number: 20180173063
    Abstract: A drain electrode 25 of a TFT 21 overlaps with a gate electrode formed integrally with a gate line 23. A pixel electrode 22 has a main body part formed on a first side of the gate line 23, and an extension part extending in an extending direction of a data line 24 and covering an overlapping portion of the gate electrode and the drain electrode 25. The drain electrode 25 is not formed on a second side of the gate line 23, whereas the extension part of the pixel electrode 22 is formed also on the second side of the gate line 23. Even when a position of the pixel electrode 22 is shifted in the extending direction of the data line 24, a parasitic capacitance between a drain and a source of the TFT 21 is kept constant, because an area of a portion where the extension part of the pixel electrode 22 overlaps with the gate line 23 does not change. With this, degradation of display quality due to a variation in the parasitic capacitance between the gate and drain of the TFT 21 can be prevented.
    Type: Application
    Filed: May 27, 2016
    Publication date: June 21, 2018
    Inventors: MASAHIRO YOSHIDA, MASAKATSU TOMINAGA, TOMOO FURUKAWA, JUNICHI MORINAGA
  • Patent number: 9726953
    Abstract: A TFT substrate (10) includes a substrate (10a); a TFT (11) supported by the substrate; a scanning line (12); a signal line (13); a first interlayer insulating layer (15) provided so as to cover the TFT; a pixel electrode (16) electrically connected to a drain electrode (11d) of the TFT; and a transparent storage capacitor electrode (17) provided so as to overlap at least a part of the pixel electrode. At least the first interlayer insulating layer has a contact hole (CH) formed therein through which the pixel electrode is electrically connected to the drain electrode. The scanning line includes a first area (R1) in which the scanning line is branched into two branched lines (12a). The contact hole is located between the two branched lines.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 8, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tomoo Furukawa, Kuniko Maeno, Junichi Morinaga, Masakatsu Tominaga, Katsuya Ogawa
  • Publication number: 20170219899
    Abstract: An active matrix substrate for a liquid crystal panel of an FFS mode includes gate lines, data lines, pixel circuits each including a switching element and a pixel electrode, a protective insulating film formed in a layer over these elements, and a common electrode 30 formed in a layer over the protective insulating film. The common electrode 30 has slits 31 corresponding to the pixel electrode, for generating a lateral electric field to be applied to a liquid crystal layer. In the common electrode 30, a cutout above data line 32 having a portion extending in the same direction as that of the data line is formed in a region including a part of a placement region for the data line. On a counter substrate, a black matrix is formed in a position that faces a region including placement regions for the gate line, the data line, the switching element, and the cutout above data line 32. This reduces display failure caused by a load of the data line.
    Type: Application
    Filed: June 24, 2015
    Publication date: August 3, 2017
    Inventors: Tomoo FURUKAWA, Junichi MORINAGA, Masakatsu TOMINAGA, Hidenobu KIMOTO, Yoshihiro SEGUCHI
  • Patent number: 9599868
    Abstract: The present invention provides a liquid crystal display panel that, when subjected to laser repair for repairing defects, can avoid degradation of members other than the target of the laser repair.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: March 21, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hijiri Nakahara, Mitsunori Harada, Masakatsu Tominaga
  • Patent number: 9268183
    Abstract: At least either a first substrate or a second substrate has regions corresponding to subpixels (15a, 15b, 15c) and provided with ribs (100a) for controlling how a liquid crystal material is aligned. Scanning signal lines (32) and picture element electrodes (60) are overlapped with each other via an insulating material as seen in plan view. The ribs (100a) and the scanning signal lines (32) are at least partially overlapped with each other as seen in plan view.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: February 23, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Katsushige Asada, Masahiro Yoshida, Masakatsu Tominaga, Tetsuya Fujikawa, Junichi Morinaga, Toshiaki Fujihara
  • Publication number: 20150062523
    Abstract: A TFT substrate (10) includes a substrate (10a); a TFT (11) supported by the substrate; a scanning line (12); a signal line (13); a first interlayer insulating layer (15) provided so as to cover the TFT; a pixel electrode (16) electrically connected to a drain electrode (11d) of the TFT; and a transparent storage capacitor electrode (17) provided so as to overlap at least a part of the pixel electrode. At least the first interlayer insulating layer has a contact hole (CH) formed therein through which the pixel electrode is electrically connected to the drain electrode. The scanning line includes a first area (R1) in which the scanning line is branched into two branched lines (12a). The contact hole is located between the two branched lines.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 5, 2015
    Inventors: Tomoo Furukawa, Kuniko Maeno, Junichi Morinaga, Masakatsu Tominaga, Katsuya Ogawa
  • Publication number: 20150036070
    Abstract: The present invention provides a liquid crystal display panel that, when subjected to laser repair for repairing defects, can avoid degradation of members other than the target of the laser repair.
    Type: Application
    Filed: February 15, 2013
    Publication date: February 5, 2015
    Inventors: Hijiri Nakahara, Mitsunori Harada, Masakatsu Tominaga
  • Patent number: 8743305
    Abstract: A liquid crystal display device in which lengths (d1 and1 d2) of respective picture element electrodes (60) in an extended direction of scanning signal lines (32) are longer than lengths (d3) of the respective picture element electrodes (60) in an extended direction of video signal lines (35) is arranged such that storage capacitor lines (36) are provided along the respective scanning signal lines (32) so as to overlap the respective picture element electrodes (60) via an insulating film (70) in plan view.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: June 3, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiro Yoshida, Satoshi Horiuchi, Masakatsu Tominaga, Junichi Morinaga, Ryohki Itoh, Katsushige Asada, Hironobu Sawada, Hitoshi Matsumoto
  • Patent number: 8400597
    Abstract: Each of picture elements (14) has a plurality of alignment regions (R1, R2, R3, and R4), in each of which liquid crystal molecules contained in a liquid crystal layer are aligned in a direction that is different from those in the others of the plurality of alignment regions. Each of a plurality of scanning signal lines (32) and a border region (R11 and R12) between corresponding adjacent ones of the plurality of alignment regions (R1, R2, R3, and R4) at least partially overlap each other when viewed from above.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: March 19, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junichi Morinaga, Katsushige Asada, Masahiro Yoshida, Tetsuya Fujikawa, Katsuhiro Mikumo, Kuniko Maeno, Ryohki Itoh, Satoshi Horiuchi, Tatsuji Saitoh, Isao Ogasawara, Kazunori Tanimoto, Katsuhiro Okada, Toshiaki Fujihara, Masakatsu Tominaga
  • Publication number: 20120182491
    Abstract: The present invention provides a liquid crystal display device that uniformly stabilizes the alignment direction of liquid crystal molecules, prevents display roughness and what is called an afterimage phenomenon in which a previous display state remains unchanged in switching display, has excellent display performance, and responds to finer pixels. A liquid crystal display device of the present invention comprises: a pair of substrates; and a liquid crystal layer sealed between the pair of substrates, wherein the liquid crystal layer contains liquid crystal molecules that are aligned vertically to a substrate surface when no voltage is applied, at least one of the pair of substrates includes a pixel electrode, a gate bus line, and a source bus line, the pixel electrode is provided with a slit, the slit bends, and a part of the slit is along the gate bus line.
    Type: Application
    Filed: May 12, 2010
    Publication date: July 19, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Katsuya Ogawa, Masakatsu Tominaga, Masayuki Takashima, Tomoo Furukawa
  • Patent number: 8125584
    Abstract: The present invention provides a liquid crystal display panel capable of providing a high contrast ratio with a storage capacitance being secured, and also provides a liquid crystal display device including such a panel. The present invention is a liquid crystal display panel having a structure in which a liquid crystal layer is interposed between a first substrate and a second substrate, wherein at least one of the first substrate and the second substrate includes a projection for liquid crystal alignment control, the first substrate includes a scanning signal line, a data signal line, a drain electrode electrically connected to a pixel electrode, a switching element, and a storage capacitor wiring, the storage capacitor wiring includes a main wiring part and a branch part, the branch part being connected to the main wiring part and overlapping with the projection for liquid crystal alignment control.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: February 28, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Satoshi Horiuchi, Toshiaki Fujihara, Masakatsu Tominaga, Hitoshi Matsumoto, Hironobu Sawada, Ryohki Itoh
  • Patent number: 7961280
    Abstract: In a semi-transmissive liquid crystal display device (50a) including an active matrix substrate (20a), the active matrix substrate (20a) includes a plurality of source lines (2), a first transparent electrode (2c) connected to each source line (2) through a TFT (5), an interlayer insulating film (12) provided on the first transparent electrode (2c) and having an opening (12a), a reflective electrode (6) provided on the interlayer insulating film (12) and connected to the first transparent electrode (2c) through the opening (12a), and a second transparent electrode (7a) overlapping the reflective electrode (6a) and the first transparent electrode (2c) and connected to the reflective electrode (6a) and the first transparent electrode (2c). In each pixel, respective outer peripheral ends (E) of the reflective electrode (6a) and the second transparent electrode (7a) are aligned with each other.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: June 14, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuyoshi Fujioka, Masaaki Saitoh, Toshiyuki Tanaka, Masakatsu Tominaga, Tetsuo Fujita, Yuji Suehiro, Hijiri Nakahara, Kazuhiro Yoshikawa
  • Publication number: 20110075087
    Abstract: Each of picture elements (14) has a plurality of alignment regions (R1, R2, R3, and R4), in each of which liquid crystal molecules contained in a liquid crystal layer are aligned in a direction that is different from those in the others of the plurality of alignment regions. Each of a plurality of scanning signal lines (32) and a border region (R11 and R12) between corresponding adjacent ones of the plurality of alignment regions (R1, R2, R3, and R4) at least partially overlap each other when viewed from above.
    Type: Application
    Filed: March 27, 2009
    Publication date: March 31, 2011
    Inventors: Junichi Morinaga, Katsushige Asada, Masahiro Yoshida, Tetsuya Fujikawa, Katsuhiro Mikumo, Kuniko Maeno, Ryohki Itoh, Satoshi Horiuchi, Tatsuji Saitoh, Isao Ogasawara, Kazunori Tanimoto, Katsuhiro Okada, Toshiaki Fujihara, Masakatsu Tominaga