Abstract: An optical communication system includes a first communication system to communicate first information from a controller to a truck and a second communication system to communicate second information. The first communication system includes a first light emitter to output the first information, a first optical fiber to transport the light output from the first light emitter while letting the light leak therefrom, and a first light receiver to receive the light leaking from the first optical fiber. The second communication system includes a second light emitter to output second information, a second optical fiber to transport the light output from the second light emitter and input to the second optical fiber at some point along the second optical fiber, and a second light receiver to receive the light transported over the second optical fiber.

Abstract: An optical communication system includes a first communication system to communicate first information from a controller to a truck and a second communication system to communicate second information. The first communication system includes; a first light emitter to output the first information, a first optical fiber to transport the light output from the first light emitter while letting the light leak therefrom, and a first light receiver to receive the light leaking from the first optical fiber. The second communication system includes a second light emitter to output second information, a second optical fiber to transport the light output from the second light emitter and input to the second optical fiber at some point along the second optical fiber, and a second light receiver to receive the light transported over the second optical fiber.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: A radiation detection circuit having a multi-channel input used for radiation measurement and capable of canceling cross-talk noise generated from a logic circuit for controlling a channel and enabling low noise radiation measurement easily and precisely. The radiation detection circuit also generates an inverted signal for each of input/output signals needed for controlling its logic and cancels a noise charge generated by coupled capacity between a bonding wire (analog input side in IC package) for connecting its output to another radiation detection circuit and a bonding wire of each of input/output signals of the logic control circuit by generating an inverted noise charge with coupled capacity between the inverted signal and its output when in logic controlling, thereby suppressing the cross-talk noise generated by each of its input/output signals.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: A radiation detection circuit having a multi-channel input used for radiation measurement and capable of canceling cross-talk noise generated from a logic circuit for controlling a channel and enabling low noise radiation measurement easily and precisely. The radiation detection circuit also generates an inverted signal for each of input/output signals needed for controlling its logic and cancels a noise charge generated by coupled capacity between a bonding wire (analog input side in IC package) for connecting its output to another radiation detection circuit and a bonding wire of each of input/output signals of the logic control circuit by generating an inverted noise charge with coupled capacity between the inverted signal and its output when in logic controlling, thereby suppressing the cross-talk noise generated by each of its input/output signals.

Abstract: A facsimile server device that can append TTI information to facsimile data in various manners. The facsimile server device is connected to a plurality of data processing devices such as client PCs over LAN, and is adapted to send facsimile data to a designated remote communication device upon instructions from a data processing device. The facsimile server device includes CPU, a keyboard or mouse and a display to set TTI information. TTI information may contain information about recipient, sender, time and page. The facsimile server device stores the TTI in RAM. TTI information in a certain form may also be provided from a data processing device. The TTI information programmed in the facsimile server device or the TTI information sent from the data processing device is given priority and appended to the facsimile data.

Abstract: A facsimile server device that can append TTI information to facsimile data in various manners. The facsimile server device is connected to a plurality of data processing devices such as client PCs over LAN, and is adapted to send facsimile data to a designated remote communication device upon instructions from a data processing device. The facsimile server device includes CPU, a keyboard or mouse and a display to set TTI information. TTI information may contain information about recipient, sender, time and page. The facsimile server device stores the TTI in RAM. TTI information in a certain form may also be provided from a data processing device. The TTI information programmed in the facsimile server device or the TTI information sent from the data processing device is given priority and appended to the facsimile data.

Abstract: A communication terminal device of the present invention is provided with both facsimile communication function and electronic mail transmission/reception function. At the transmission side, scanned image data is coded by MH, MR method and the like, converted to text data, then edited according to electronic mail format for transmitting it as an electronic mail to computer network like internet. The transmission side also transmits by facsimile (by a circuit switching method) a transmission notification indicating transmission of the electronic mail and a signal indicating reception of the electronic mail. After receiving the signal requesting reception of the electronic mail, the receiving side receives the electronic mail from the computer network, converts it into image data and prints the image data out by facsimile.

Abstract: A fax server connected to a plurality of client PCs and user LAN, forming a client-server system. It is also connected via an ISDN or PSTN line to a fax server of another communication network. A communication activity record which matches a reception record of receipt confirmation from a recipient with a transmission record of the transmitted document is generated and displayed on the screen of a display unit. This communication activity record can be output from printer, or displayed as printed characters.