Patents by Inventor Masakazu Satoh

Masakazu Satoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7647420
    Abstract: A method and apparatus for controlling a transmission of data from a first storage device to a second storage device. The first storage device includes a recording unit for recording the data, a buffer for temporarily storing the data read from the recording unit, and a transmission unit for transmitting the data read from the buffer. It is determined that sufficient buffer space in the buffer is not available for the transmission of the data in a predetermined time interval. It is ascertained whether a transmission error exists in a communication line connecting the first storage device to the second storage device. If the transmission error exits, then the transmission unit is controlled to not perform the transmission of the data from the first storage device; otherwise the transmission unit is not controlled to not perform the transmission of the data from the first storage device.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: January 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: Masakazu Satoh, Kazunari Suzuki
  • Publication number: 20090201274
    Abstract: A timing signal generating device for a matrix-type display apparatus is disclosed, conducive to reduction of power consumption, the matrix-type display apparatus including the timing signal generating device, and a driving method thereof. In at least one embodiment, a timing signal generating apparatus provided in an active-matrix liquid crystal display apparatus includes a horizontal direction counter and a vertical direction counter for counting a clock number; and a horizontal counter cessation circuit and a vertical counter cessation circuit for stopping the horizontal direction counter and the vertical direction counter at a predetermined timing. With this structure, at least one embodiment of the present invention achieves reduction in power consumption in the liquid crystal display apparatus.
    Type: Application
    Filed: September 28, 2005
    Publication date: August 13, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Nobuhiro Kuwabara, Tomoyuki Nagai, Tamotsu Sakai, Kazuhiro Maeda, Shuji Nishi, Masakazu Satoh
  • Publication number: 20090051678
    Abstract: A readily-mountable low-cost active matrix display apparatus with a setup function is provided. A serial interface circuit 20 and setup circuits 16 are each formed of TFT elements on a liquid crystal panel 11. The serial interface circuit 20 performs serial-parallel conversion on a setup control signal 17 serially inputted via setup terminals 15. The setup circuits 16 change the states of signals flowing in the liquid crystal panel 11 in accordance with signals outputted in parallel from the serial interface circuit 20. Thus, it is possible to change the potential, timing, etc., of signals inputted to or outputted from any peripheral circuits formed on the liquid crystal panel 11 or any peripheral circuits included in a semiconductor chip mounted on the surface of the liquid crystal panel 11.
    Type: Application
    Filed: April 3, 2006
    Publication date: February 26, 2009
    Inventors: Masakazu Satoh, Tomoyuki Nagai, Kazuhiro Maeda, Tamotsu Sakai, Shuji Nishi
  • Patent number: 7466649
    Abstract: In one general embodiment, a method for setting a value of waiting time for switching is provided. At a node in a sonet ring, it is determined which path to the node is an actual path and which path is a preliminary path. Additionally, it is determined whether a one way fiber transmission delay of the actual path is less than a one way fiber transmission delay of the preliminary path. If the one way fiber transmission delay of the actual path is greater than the one way fiber transmission delay of the preliminary path, a switching time is set to zero and normal switching is performed. If the one way fiber transmission delay of the actual path is less than the one way fiber transmission delay of the preliminary path, a switching time is set equal to the one way fiber transmission delay of the preliminary path minus the one way fiber transmission delay of the actual path and it is determined whether a path alarm indication signal (AIS) occurred in the actual path.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: December 16, 2008
    Assignee: International Business Machines Corporation
    Inventors: Chienho Chen, Masakazu Satoh, Kazunari Suzuki, Takashi Murata
  • Patent number: 7365727
    Abstract: A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: April 29, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masakazu Satoh, Yasushi Kubota, Hajime Washio, Kazuhiro Maeda, Michael James Brownlow, Graham Andrew Cairns
  • Patent number: 7348955
    Abstract: The sending party of a display-use image signal adds to a signal representing a display image a control parameter signal composed of a control tag signal specifying a controlled object and control start/end identification signal Ts or Te between a specific parameter start signal Ps and parameter end signal Pe. Upon the reception of the thus produced display-use image signal Si, a display device detects the signal Ps in the input signal Si using a tag decoder and makes a judgement whether the succeeding start/end identification signal is Ts or Te. Thereafter, upon the detection of Pe in the input signal Si, a control tag signal is derived from a signal division between the detected Ps and Pe, and signals C1 to C4 for controlling various parts of the display device, etc. are produced from the control tag signal and the judgement of the start/end identification signal.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: March 25, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masakazu Satoh, Masahiro Adachi
  • Publication number: 20070116285
    Abstract: A method for processing a communication data item. The communication data item is divided into at least two unencrypted packets to be encrypted. Each encrypted packet is generated from a corresponding unencrypted packet. Each unencrypted packet has a packet header and plaintext data. The packet header has an identifier field that includes a packet identifier. The packet identifier is identical for all unencrypted packets. Generating an encrypted packet for each unencrypted packet includes: determining a vector identifier from the identical packet identifier, wherein the vector identifier is associated with the identical packet identifier; ascertaining an initial vector from the vector identifier; and forming an encrypted packet header by inserting the vector identifier into a first portion of the packet header and encrypting a second portion of the packet header through use of the initial vector. The encrypted packets are subsequently decrypted and combined to reconstruct the communication data item.
    Type: Application
    Filed: November 16, 2006
    Publication date: May 24, 2007
    Applicant: International Business Machines Corporation
    Inventors: Shinji Nakai, Masakazu Satoh, Kazunari Suzuki
  • Publication number: 20060212603
    Abstract: A method and apparatus for controlling a transmission of data from a first storage device to a second storage device. The first storage device includes a recording unit for recording the data, a buffer for temporarily storing the data read from the recording unit, and a transmission unit for transmitting the data read from the buffer. It is determined that sufficient buffer space in the buffer is not available for the transmission of the data in a predetermined time interval. It is ascertained whether a transmission error exists in a communication line connecting the first storage device to the second storage device. If the transmission error exits, then the transmission unit is controlled to not perform the transmission of the data from the first storage device; otherwise the transmission unit is not controlled to not perform the transmission of the data from the first storage device.
    Type: Application
    Filed: March 2, 2006
    Publication date: September 21, 2006
    Applicant: International Business Machines Corporation
    Inventors: Masakazu Satoh, Kazunari Suzuki
  • Publication number: 20060209893
    Abstract: A communication relay apparatus, information management system, and control method and program therefor. The communication relay apparatus includes several communication ports, and that includes a communication relay section, a buffer, a control signal transmitting section, a bandwidth information acquiring section, and a transmission interval control section.
    Type: Application
    Filed: March 14, 2006
    Publication date: September 21, 2006
    Applicant: International Business Machines Corporation
    Inventors: Masakazu Satoh, Kazunari Suzuki
  • Publication number: 20060005011
    Abstract: Authentication of a hardware token connected to a computer includes storing, in the hardware token, a computer public key Ck generated in the computer; reading out, from the hardware token to the computer, a user public key Uk, registering the user public key Uk from the computer with a certificate authority, and receiving a certificate issued from the certificate authority with respect to the user public key Uk, and storing the issued certificate for the user public key Uk in the hardware token.
    Type: Application
    Filed: February 22, 2005
    Publication date: January 5, 2006
    Applicant: International Business Machines Corporation
    Inventor: Masakazu Satoh
  • Publication number: 20050200591
    Abstract: A plurality of scanning signal lines GLn divided into groups, and each group is made up of three scanning signal lines GLnR, GLnG and GLnB, and a plurality of pixels are divided into pixel blocks, and each pixel block is made up of three pixels PR (n, m), PG (n, m) and PB (n, m) respectively connected to the scanning signal lines GLnR, GLnG and GLnB. These pixels PR (n, m), PG (n, m) and PB (n, m) are connected to a common data signal line SLm. To the scanning signal lines GLnR, GLnG, GLnB, scanning pulses are sequentially outputted to the scanning signal lines GLnR, GLnG and GLnB from shift registers SRnR, SRnG and SRnB, and video signals for R, G and B are outputted to the data signal line SLm from a driver IC by time division.
    Type: Application
    Filed: February 16, 2005
    Publication date: September 15, 2005
    Inventors: Masakazu Satoh, Hajime Washio, Sadahiko Yasukawa
  • Publication number: 20040183771
    Abstract: A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease.
    Type: Application
    Filed: February 25, 2004
    Publication date: September 23, 2004
    Inventors: Masakazu Satoh, Yasushi Kubota, Hajime Washio, Kazuhiro Maeda, Michael James Brownlow, Graham Andrew Cairns
  • Patent number: 6724363
    Abstract: A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: April 20, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masakazu Satoh, Yasushi Kubota, Hajime Washio, Kazuhiro Maeda, Michael James Brownlow, Graham Andrew Cairns
  • Publication number: 20020196244
    Abstract: The sending party of a display-use image signal adds to a signal representing a display image a control parameter signal composed of a control tag signal specifying a controlled object and control start/end identification signal Ts or Te between a specific parameter start signal Ps and parameter end signal Pe. Upon the reception of the thus produced display-use image signal Si, a display device detects the signal Ps in the input signal Si using a tag decoder and makes a judgement whether the succeeding start/end identification signal is Ts or Te. Thereafter, upon the detection of Pe in the input signal Si, a control tag signal is derived from a signal division between the detected Ps and Pe, and signals C1 to C4 for controlling various parts of the display device, etc. are produced from the control tag signal and the judgement of the start/end identification signal.
    Type: Application
    Filed: June 13, 2002
    Publication date: December 26, 2002
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Masakazu Satoh, Masahiro Adachi
  • Patent number: 4803266
    Abstract: 2-Azetidione derivatives represented by the following formula ##STR1## wherein X is a hydrogen atom, a halogen atom, a lower alkyl group, a lower alkoxy group, a hydroxyl group or a cyano group, l is 1 or 2, R.sup.1 is a lower alkyl group, a cycloalkyl group, a 1-naphthylmethyl group, an optionally substituted phenethyl group, an optionally substituted phenyl group, an optionally substituted benzyl group or a bis(alkoxycarbonyl)ethyl group, and R.sup.2 is a lower alkyl group, a lower alkoxy group, an amino group, an adamantyl group, a lower alkoxycarbonylmethyl group or an optionally substituted phenyl group, are disclosed. These compounds are useful as blood platelet aggregation inhibiting agents.
    Type: Grant
    Filed: October 5, 1987
    Date of Patent: February 7, 1989
    Assignee: Taisho Pharmaceutical Co., Ltd.
    Inventors: Yutaka Kawashima, Masakazu Satoh, Yuichi Hatada, Fumiko Hazato, Yoshimoto Nakashima, Kaoru Sota
  • Patent number: 4227809
    Abstract: A method of detecting minute flaws on the surface of a metal material is provided, which is constituted by the steps of directing a laser beam onto the surface of the metal material, reflecting a component of the beam directly reflected by the surface of the material by a reflector having a rough surface, and measuring the change in the quantity of light in the beam reflected by said reflector. Alternatively, a component of the laser beam directly reflected by the surface of the material and a component of the laser beam scattered by the metal surface are passed through a semitransparent filter having a rough surface, and the change in the quantity of light in the beam passed through the filter is measured.
    Type: Grant
    Filed: September 22, 1978
    Date of Patent: October 14, 1980
    Assignee: Doryokuro Kakunenryo Kaihatsu Jigyodan
    Inventors: Masakazu Satoh, Miyuki Igarashi, Shigeo Senoo