Abstract: An optical signal amplifying apparatus feeding back surrounding light to perform negative feedback optical amplification of a semiconductor optical amplifier is provided that enables a coupling structure to be simplified and miniaturized between the semiconductor optical amplifier and an optical fiber transmitting the output light from the semiconductor optical amplifier by using a fiber grating device.

Abstract: A switching power supply unit of the present invention a timing generating circuit (121) which receives a first control signal formed by a rectifier-transistor driving circuit (104), forms a second control signal based on the first control signal, and supplies the second control signal to a control electrode of the rectifier transistor (113). The first control signal is synchronized with the switching operation of a half-bridge circuit (102), and the second control signal exceeds a threshold voltage of a rectifier transistor (113) at a timing substantially equal to the timing that one edge of the first control signal is generated and falls below the threshold voltage of the rectifier transistor (113) at a timing earlier by predetermined time than the timing that the other edge of the first control signal is generated.

Abstract: A switching power supply unit of the present invention a timing generating circuit (121) which receives a first control signal formed by a rectifier-transistor driving circuit (104), forms a second control signal based on the first control signal, and supplies the second control signal to a control electrode of the rectifier transistor (113).

Abstract: A rectifying circuit having a pair of input terminals at which voltage having an AC waveform appears, a plurality of first rectifying elements 41, a plurality of second rectifying elements 42, a first wiring pattern 71 for connecting one of the paired input terminals to the plurality of first rectifying elements 41, and a second wiring pattern 72 for connecting the other of the paired input terminals to the plurality of second rectifying elements 42. In the rectifying circuit, the plurality of first rectifying elements 41 and the plurality of second rectifying elements 42 are laid out so that at least two boundaries between the first and second rectifying elements adjacent to each other are present. With such a layout of the rectifying elements, current flow paths between one of the input terminals and the plurality of first rectifying elements 41 and current flow paths between the other of the input terminals and the plurality of second rectifying elements 42, are closely disposed.

Abstract: A multi-stage DC—DC converter is provided that utilizes multiple loops in the control system to perform stable operation. The multi-stage DC—DC converter includes: a first DC—DC converter, a second DC—DC converter provided as a latter stage to said first DC—DC converter and a control circuit that controls the switching operation performed by said first DC—DC converter based on at least the output voltage of said first DC—DC converter and the output voltage of said second DC—DC converter.

Abstract: A switching power supply unit of the present invention a timing generating circuit (121) which receives a first control signal formed by a rectifier-transistor driving circuit (104), forms a second control signal based on the first control signal, and supplies the second control signal to a control electrode of the rectifier transistor (113). The first control signal is synchronized with the switching operation of a half-bridge circuit (102), and the second control signal exceeds a threshold voltage of a rectifier transistor (113) at a timing substantially equal to the timing that one edge of the first control signal is generated and falls below the threshold voltage of the rectifier transistor (113) at a timing earlier by predetermined time than the timing that the other edge of the first control signal is generated.

Abstract: A multi-stage DC-DC converter is provided that utilizes multiple loops in the control system to perform stable operation. The multi-stage DC-DC converter includes: a first DC-DC converter, a second DC-DC converter provided as a latter stage to said first DC-DC converter and a control circuit that controls the switching operation performed by said first DC-DC converter based on at least the output voltage of said first DC-DC converter and the output voltage of said second DC-DC converter.

Abstract: A rectifying circuit having a pair of input terminals at which voltage having an AC waveform appears, a plurality of first rectifying elements 41, a plurality of second rectifying elements 42, a first wiring pattern 71 for connecting one of the paired input terminals to the plurality of first rectifying elements 41, and a second wiring pattern 72 for connecting the other of the paired input terminals to the plurality of second rectifying elements 42. In the rectifying circuit, the plurality of first rectifying elements 41 and the plurality of second rectifying elements 42 are laid out so that at least two boundaries between the first and second rectifying elements adjacent to each other are present. With such a layout of the rectifying elements, current flow paths between one of the input terminals and the plurality of first rectifying elements 41 and current flow paths between the other of the input terminals and the plurality of second rectifying elements 42, are closely disposed.

Abstract: A switching power supply unit of the present invention a timing generating circuit (121) which receives a first control signal formed by a rectifier-transistor driving circuit (104), forms a second control signal based on the first control signal, and supplies the second control signal to a control electrode of the rectifier transistor (113).

Abstract: A semiconductor device that can short-circuit with a low impedance a gate-to-source capacitance of an FET as a main switch device. The aforementioned semiconductor device includes a first FET, a second FET, and a package. The first FET and the second FET are placed in the package. The first FET composes a main switch device. The second FET has its drain and source connected to the gate and the source of the first FET. The package includes external terminals for the first and second FETs on its outer surface.

Abstract: There is disclosed a synchronized rectifier type switching power source device in which losses and noise generation due to differences in operating delay times in the input and output switching elements can be suppressed. A signal timing adjusting device is provided for controlling the timing of the control signal applied to the first switching device provided in the input side and those of the control signals applied to the second and third switching devices provided in the output side, so that the control signal is applied to the first switching device with a timing delayed as compared with the timings of the control signals applied to the second and third switching devices to thereby compensate for the operating time delay among the first switching device and the second and third switching devices due to the differences in the voltage durability and the current capacity among these switching devices.