Patents by Inventor Masaki Ebina

Masaki Ebina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079177
    Abstract: A multilayer coil component includes an element body, a plurality of coil conductors, a first resistive layer, and a second resistive layer. The plurality of coil conductors are disposed in the element body and electrically connected to each other. The plurality of coil conductors include a first coil conductor and a second coil conductor adjacent to each other. The first resistive layer and the second resistive layer oppose each other between the first coil conductor and the second coil conductor. The first resistive layer is in contact with the first coil conductor.
    Type: Application
    Filed: July 26, 2023
    Publication date: March 7, 2024
    Applicant: TDK CORPORATION
    Inventors: Yusuke NAGAI, Kazuhiro EBINA, Takahiro SATO, Masaki TAKAHASHI, Takashi ENDO, Yuya ISHIMA, Kosuke ITO, Takuya MIYASHITA
  • Patent number: 4660067
    Abstract: The complementary MOS integrated circuit has a first channel MOS FET in a substrate of one conductivity type and a second channel MOS FET in a well region of the other conductivity type, and further comprises a first high impurity region of the one conductivity type formed in the substrate so as to surround the first channel MOS FET, a second high inpurity region of the other conductivity type formed in the well region so as to surround the second channel MOS FET, a first insulator film covering the first and second high impurity regions and having a plurality of first holes, a first wiring layer formed on the first insulator film with connections with the first high impurity region through the first holes, so as to surround the first channel MOS FET, a second wiring layer formed on the first insulator film with connections with the second high impurity region through the second holes, so as to surround the second channel MOS FET, a second insulator film covering the first and second wiring layers and having
    Type: Grant
    Filed: July 30, 1985
    Date of Patent: April 21, 1987
    Assignee: NEC Corporation
    Inventor: Masaki Ebina