Patents by Inventor Masaki Fujioka
Masaki Fujioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240114571Abstract: A communication device that communicates with an external device using a first connection method and a second connection method is disclosed. The communication device, when a connection is established with an external device, determines whether to automatically display a screen for using the external device from the communication device on a display device, based on (i) a connection method used to connect to the external device and/or (ii) whether the external device is newly connected or reconnected.Type: ApplicationFiled: September 6, 2023Publication date: April 4, 2024Inventor: MASAKI FUJIOKA
-
Patent number: 11869174Abstract: An image processing apparatus according to the present invention, includes at least one memory and at least one processor function as: a first determining unit configured to determine a first brightness range, which is included in a dynamic range of a first image and is higher than a predetermined brightness; and a first converting unit configured to convert the first image into a second image, of which a dynamic range is narrower than the dynamic range of the first image, based on the determination result by the first determining unit, wherein based on the first brightness range determined by the first determining unit, the first converting unit determines a second brightness range, which is included in the dynamic range of the second image and corresponds to the first brightness range.Type: GrantFiled: March 9, 2022Date of Patent: January 9, 2024Assignee: CANON KABUSHIKI KAISHAInventors: Masaki Fujioka, Masaharu Yamagishi, Takehito Fukushima
-
Publication number: 20230300476Abstract: An image correction apparatus which improves the accuracy of color matching between image pickup apparatuses. The image correction apparatus performs color matching between the image pickup apparatuses using picked-up images generated by displaying a display image on a display screen and causing the plurality of image pickup apparatuses to shoot the display image. In the image correction apparatus, viewing angle correction values for use in correcting viewing angle characteristics resulting from positions of the plurality of image pickup apparatuses with respect to the display screen to a predetermined viewing angle characteristics are stored in memory, corrected images are generated by subjecting the display image in the picked-up images to correction using the viewing angle correction values, and color correction values for use in color matching between the plurality of corrected images are calculated.Type: ApplicationFiled: March 10, 2023Publication date: September 21, 2023Inventor: Masaki FUJIOKA
-
Publication number: 20220301126Abstract: An image processing apparatus according to the present invention, includes at least one memory and at least one processor function as: a first determining unit configured to determine a first brightness range, which is included in a dynamic range of a first image and is higher than a predetermined brightness; and a first converting unit configured to convert the first image into a second image, of which a dynamic range is narrower than the dynamic range of the first image, based on the determination result by the first determining unit, wherein based on the first brightness range determined by the first determining unit, the first converting unit determines a second brightness range, which is included in the dynamic range of the second image and corresponds to the first brightness range.Type: ApplicationFiled: March 9, 2022Publication date: September 22, 2022Inventors: Masaki Fujioka, Masaharu Yamagishi, Takehito Fukushima
-
Patent number: 10440337Abstract: A projection apparatus, comprises a projection unit configured to project an image onto a screen including a target image, a switching unit configured to switch to one of a first image for indicating a position deviation between a projection area in which the projection unit projects an image and the target image, and a second image for increasing contrast of the target image, and a control unit configured to control the projection unit so as to project an image in the projection area based on an image to which the switching unit has switched, wherein the first image is an image that has a predetermined relationship with colors of the target image.Type: GrantFiled: May 21, 2018Date of Patent: October 8, 2019Assignee: Canon Kabushiki KaishaInventors: Hidetoshi Wada, Masaki Fujioka
-
Patent number: 10148922Abstract: A display system includes a master device that displays a master image corresponding to a part of image data, and a slave device that displays a slave image corresponding to another part of the image data. The slave device includes a slave signal generation unit that starts to generate a slave timing signal at a predetermined interval with reference to a timing based on a first instruction received from the master device, a slave communication unit that transmits to the master device a completion notification indicating that a preparation for displaying the slave image is completed, and a slave display unit that displays the slave image in synchronization with the slave timing signal corresponding to a second instruction received from the master device.Type: GrantFiled: January 15, 2016Date of Patent: December 4, 2018Assignee: Canon Kabushiki KaishaInventors: Masaki Fujioka, Norihiro Kawahara, Kohei Murayama, Yoshio Nishioka
-
Publication number: 20180343426Abstract: A projection apparatus, comprises a projection unit configured to project an image onto a screen including a target image, a switching unit configured to switch to one of a first image for indicating a position deviation between a projection area in which the projection unit projects an image and the target image, and a second image for increasing contrast of the target image, and a control unit configured to control the projection unit so as to project an image in the projection area based on an image to which the switching unit has switched, wherein the first image is an image that has a predetermined relationship with colors of the target image.Type: ApplicationFiled: May 21, 2018Publication date: November 29, 2018Inventors: Hidetoshi Wada, Masaki Fujioka
-
Patent number: 9936180Abstract: A projector calculates an input-output characteristic for converting a tone value of an input image so as to perform display in a given projectable luminance range in a display absolute luminance range of an input signal, in accordance with the brightness of the projection surface. An output signal is generated from the input signal and projected, based on the calculated input-output characteristic. With the disclosed projector, image data having an input luminance range that is different from the output luminance range can be appropriately displayed.Type: GrantFiled: March 28, 2017Date of Patent: April 3, 2018Assignee: CANON KABUSHIKI KAISHAInventor: Masaki Fujioka
-
Publication number: 20170289508Abstract: A projector calculates an input-output characteristic for converting a tone value of an input image so as to perform display in a given projectable luminance range in a display absolute luminance range of an input signal, in accordance with the brightness of the projection surface. An output signal is generated from the input signal and projected, based on the calculated input-output characteristic. With the disclosed projector, image data having an input luminance range that is different from the output luminance range can be appropriately displayed.Type: ApplicationFiled: March 28, 2017Publication date: October 5, 2017Inventor: Masaki FUJIOKA
-
Publication number: 20170214895Abstract: A projector includes an image input unit for obtaining a first input image and a second input image, an optical system control unit for projecting a first projection image based on the first input image and a second projection image based on the second input image on a screen, and a CPU causing a projection unit to project the first projection image and the second projection image in different layouts depending on whether the transition is one from a state of projecting the first projection image to a state of projecting the first projection image and the second projection image simultaneously by means of the projection apparatus alone or one from a state of projecting the first projection image to a state of projecting the first projection image and the second projection image simultaneously by means of the projection apparatus in cooperation with a different projector.Type: ApplicationFiled: January 19, 2017Publication date: July 27, 2017Inventor: Masaki Fujioka
-
Publication number: 20160212393Abstract: A display system includes a master device that displays a master image corresponding to a part of image data, and a slave device that displays a slave image corresponding to another part of the image data. The slave device includes a slave signal generation unit that starts to generate a slave timing signal at a predetermined interval with reference to a timing based on a first instruction received from the master device, a slave communication unit that transmits to the master device a completion notification indicating that a preparation for displaying the slave image is completed, and a slave display unit that displays the slave image in synchronization with the slave timing signal corresponding to a second instruction received from the master device.Type: ApplicationFiled: January 15, 2016Publication date: July 21, 2016Inventors: Masaki Fujioka, Norihiro Kawahara, Kohei Murayama, Yoshio Nishioka
-
Patent number: 9160327Abstract: A semiconductor device including an input terminal to receive an input signal and an output terminal to output an output signal includes delay elements connected in series with the input terminal and each to assign the delay to the input signal input from the input terminal, selectors connected to output sides of the delay elements and each to select one of output signals of the delay elements based on a selection signal for selecting the one of the output signals of the delay elements to return the selected one of the output signals to the output terminal, and delay circuits disposed corresponding to the selectors and each to cause switching of the selection signal input into a corresponding one of the selectors to occur after switching of a signal level of the input signal input into the corresponding one of the selectors serving as a signal turning point.Type: GrantFiled: May 23, 2013Date of Patent: October 13, 2015Assignee: FUJITSU LIMITEDInventors: Masaki Fujioka, Koji Migita, Kazumasa Kubotera, Yasutaka Kanayama
-
Patent number: 8698536Abstract: Plural unit delay circuits connected in series and an output circuit that non-inverts or inverts and outputs an output signal in accordance with a set signal are included. A first unit delay circuit includes a selector that outputs a signal input to a second input terminal when the set signal is “0”, and outputs a signal input to a first input terminal when the set signal is “1”, and an inverter that inverts and outputs an output of the selector from a second output terminal. A second unit delay circuit includes an inverter that inverts the signal input to the first input terminal and outputs from a first output terminal, and a selector that outputs the signal input to the second input terminal when the set signal is “0”, and outputs an output of the inverter when the set signal is “1” from the second output terminal.Type: GrantFiled: February 27, 2013Date of Patent: April 15, 2014Assignees: Fujitsu Limited, Fujitsu Semiconductor LimitedInventors: Kazumasa Kubotera, Yasutaka Kanayama, Masaki Fujioka, Hiroshi Miyake
-
Publication number: 20130257501Abstract: Plural unit delay circuits connected in series and an output circuit that non-inverts or inverts and outputs an output signal in accordance with a set signal are included. A first unit delay circuit includes a selector that outputs a signal input to a second input terminal when the set signal is “0”, and outputs a signal input to a first input terminal when the set signal is “1”, and an inverter that inverts and outputs an output of the selector from a second output terminal. A second unit delay circuit includes an inverter that inverts the signal input to the first input terminal and outputs from a first output terminal, and a selector that outputs the signal input to the second input terminal when the set signal is “0”, and outputs an output of the inverter when the set signal is “1” from the second output terminal.Type: ApplicationFiled: February 27, 2013Publication date: October 3, 2013Applicants: FUJITSU SEMICONDUCTOR LIMITED, FUJITSU LIMITEDInventors: Kazumasa KUBOTERA, Yasutaka KANAYAMA, Masaki FUJIOKA, Hiroshi MIYAKE
-
Publication number: 20130254434Abstract: A semiconductor device including an input terminal to receive an input signal and an output terminal to output an output signal includes delay elements connected in series with the input terminal and each to assign the delay to the input signal input from the input terminal, selectors connected to output sides of the delay elements and each to select one of output signals of the delay elements based on a selection signal for selecting the one of the output signals of the delay elements to return the selected one of the output signals to the output terminal, and delay circuits disposed corresponding to the selectors and each to cause switching of the selection signal input into a corresponding one of the selectors to occur after switching of a signal level of the input signal input into the corresponding one of the selectors serving as a signal turning point.Type: ApplicationFiled: May 23, 2013Publication date: September 26, 2013Applicant: FUJITSU LIMITEDInventors: Masaki Fujioka, Koji Migita, Kazumasa Kubotera, Yasutaka Kanayama
-
Patent number: D1021148Type: GrantFiled: November 17, 2021Date of Patent: April 2, 2024Assignee: SEKISUI CHEMICAL CO., LTD.Inventors: Moyuru Okajima, Kouhei Yamaguchi, Koji Kido, Masaki Yamamoto, Sho Fujioka