Abstract: A semiconductor device includes first and second resistor groups, first and second switch groups, a register, and an amplifier. The first resistor group includes plural first resistors connected in series between a first terminal and an output of the amplifier. The first switch group includes plural first switches. Each of the first switches is connected between a corresponding one of the connection point between the first resistors and the inverting input terminal of the amplifier. The second resistor group includes plural second resistors connected in series between a second terminal of the amplifier and a reference voltage source. The second switch group includes plural second switches. Each of the second switches is connected between a corresponding one of the connection point between the second resistors and a positive input terminal of the amplifier. The register selects each of first and second switches.

Abstract: A semiconductor device includes first and second resistor groups, first and second switch groups, a register, and an amplifier. The first resistor group includes plural first resistors connected in series between a first terminal and an output of the amplifier. The first switch group includes plural first switches. Each of the first switches is connected between a corresponding one of the connection point between the first resistors and the inverting input terminal of the amplifier. The second resistor group includes plural second resistors connected in series between a second terminal of the amplifier and a reference voltage source. The second switch group includes plural second switches. Each of the second switches is connected between a corresponding one of the connection point between the second resistors and a positive input terminal of the amplifier. The register selects each of first and second switches.

Abstract: A semiconductor device includes first and second resistor groups, first and second switch groups, a register, and an amplifier. The first resistor group includes plural first resistors connected in series between a first terminal and an output of the amplifier. The first switch group includes plural first switches. Each of the first switches is connected between a corresponding one of the connection point between the first resistors and the inverting input terminal of the amplifier. The second resistor group includes plural second resistors connected in series between a second terminal of the amplifier and a reference voltage source. The second switch group includes plural second switches. Each of the second switches is connected between a corresponding one of the connection point between the second resistors and a positive input terminal of the amplifier. The register selects each of first and second switches.

Abstract: In an inverter control circuit for controlling an inverter circuit, when an analog signal from the inverter circuit is amplified and converted from analog to digital, a timing at which a gain of an amplifier is switched is securely detected, and the gain is switched. An inverter control circuit includes: a timer circuit for generating a PWM signal with which an electric conductive state of a switch device of an inverter circuit is controlled; an amplifier for amplifying and outputting an analog signal generated with a load electric current of the inverter circuit; and a gain control circuit for controlling the switching of the gain of the amplifier in synchronization with an output change timing of the PWM signal.

Abstract: In an inverter control circuit for controlling an inverter circuit, when an analog signal from the inverter circuit is amplified and converted from analog to digital, a timing at which a gain of an amplifier is switched is securely detected, and the gain is switched. An inverter control circuit includes: a timer circuit for generating a PWM signal with which an electric conductive state of a switch device of an inverter circuit is controlled; an amplifier for amplifying and outputting an analog signal generated with a load electric current of the inverter circuit; and a gain control circuit for controlling the switching of the gain of the amplifier in synchronization with an output change timing of the PWM signal.

Abstract: A delay circuit which resists noise present in the power supply or ground includes a waveform modification circuit for varying the rise and fall of inputted pulse signals, and a switch for connecting a power supply and an output terminal when the voltage of the modified waveform exceeds the threshold value related to the power supply voltage. The waveform modification circuit includes a voltage control circuit for varying the output voltage of the waveform modification circuit in accordance with changes in the voltage of the power supply. To reshape a waveform, an input signal is compared with the power supply voltage as a reference value, and the input signal and power supply voltage are switched in accordance with the comparison results. The voltage control circuit changes the output of the waveform modification circuit in accordance with the changes in the reference when noise contained in the power supply voltage is applied to the output of the waveform modification circuit.

Abstract: A delay circuit comprising at least one capacitor with one electrode thereof is connected to a fixed potential, a signal transmission line, and at least one switch means between the other electrode of the capacitor and the signal transmission line. The switch means makes electrical connection or disconnection between the capacitor and the signal transmission line in accordance with an actual supply voltage value.

Abstract: A CMOS inverter capable of reducing a through current therein including an E-type PMOS transistor, an E-type NMOS transistor and a D-type NMOS transistor. In the E-type PMOS transistor, the gate and the drain are connected to input and output terminals. In the E-type NMOS transistor, the gate and the drain are connected to the input and the output terminals and the source to the ground. In the D-type NMOS transistor, the source is connected to the source of the E-type PMOS transistor, the gate to the ground, and the drain to a power source.