Patents by Inventor Masaki Hatano
Masaki Hatano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220262841Abstract: Circuits are added while an increase in size of a semiconductor package is prevented. The semiconductor package includes a transparent member; an embedding resin; an embedded circuit; and a solid-state image pickup element. In the semiconductor package, the embedding resin is formed around the transparent member. Further, in the semiconductor package, the embedded circuit is embedded in the embedding resin. Further, in the semiconductor package, the solid-state image pickup element performs photoelectric conversion on light that has passed through the transparent member and thereby generates image data.Type: ApplicationFiled: May 22, 2020Publication date: August 18, 2022Inventors: HIROYUKI SHIGETA, KOHYOH HOSOKAWA, JO UMEZAWA, MASAKI HATANO, HIROFUMI MAKINO, TOSHIKI KOYAMA
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Publication number: 20210313367Abstract: In a semiconductor device, to enable control of the occurrence of warpage of a sensor chip serving as a semiconductor element and a change in the warpage as well as prevention of limitation on an arrangement area of an external terminal and a peripheral component. There is included a semiconductor element in which one plate surface side of a semiconductor substrate is set as a light-receiving side, a substrate part having a recess, the recess being open to face a front surface side that is the light-receiving side and positioning the semiconductor element on the front surface side, and a plate shaped member positioned in the recess in a state where the plate shaped member is fixed to the substrate part, the plate shaped member fixing the semiconductor element to one plate surface side and being provided via a gap on at least another plate surface side with respect to a surface forming the recess.Type: ApplicationFiled: June 24, 2019Publication date: October 7, 2021Inventor: MASAKI HATANO
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Patent number: 8579368Abstract: A seat for a vehicle includes a seat cushion frame reciprocating between seating and retracted positions, a seat back frame rotatable between standing and forward-tilted positions, a head rest movable between stationary and retracted positions, a pair of links provided at both end portions of the seat cushion frame on a floor in a lateral direction of the vehicle, a guide member including a guide groove extending between the seating and retracted positions, a slide member arranged at the seat cushion frame and sliding along the guide groove, a head rest retaining device retaining the head rest in the stationary position, a rotary member supported by the seat back frame and rotated by the slide member, and an interlocking device arranged between the rotary member and the head rest retaining device and releasing the head rest from the stationary position in accordance with a rotation of the rotary member.Type: GrantFiled: August 20, 2010Date of Patent: November 12, 2013Assignees: Aisin Seiki Kabushiki Kaisha, Toyota Boshoku Kabushiki KaishaInventors: Motohiro Kokubo, Masaki Hatano, Hideki Fujisawa, Kazuya Iwasa, Hiroaki Hayahara
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Patent number: 8455969Abstract: A semiconductor device includes a semiconductor substrate having a first electronic circuit and a second electronic circuit formed on an active surface, a pad electrode formed on the active surface by being connected to the first electronic circuit and/or the second electronic circuit, a first opening formed to some point along a depth of the semiconductor substrate toward the pad electrode from a surface opposite to the active surface of the semiconductor substrate, a second opening formed so as to reach the pad electrode from a bottom surface of the first opening, an insulating layer formed by covering sidewall surfaces of the first opening and the second opening, a conductive layer formed by covering at least an inner wall surface of the insulating layer and a bottom surface of the second opening, a third opening formed to some point along the depth of the semiconductor substrate from the surface opposite to the active surface of the semiconductor substrate, and a heat insulator imbedded in the third openiType: GrantFiled: April 8, 2008Date of Patent: June 4, 2013Assignee: Sony CorporationInventors: Yoshihiro Nabe, Masaki Hatano, Hiroshi Asami, Akihiro Morimoto
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Publication number: 20120205817Abstract: A semiconductor device including a component substrate of a semiconductor device; electrode pads provided on one surface of the component substrate; a support plate material reinforcing the component substrate; via holes made in the support plate material; a conducting material filled in the via holes; and a joining member interposed between the electrode pads and the conducting material and joining the component substrate and the support plate material.Type: ApplicationFiled: April 24, 2012Publication date: August 16, 2012Applicant: SONY CORPORATIONInventors: Hiroshi Asami, Masaki Hatano, Akihiro Morimoto
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Publication number: 20110043024Abstract: A seat for a vehicle includes a seat cushion frame reciprocating between seating and retracted positions, a seat back frame rotatable between standing and forward-tilted positions, a head rest movable between stationary and retracted positions, a pair of links provided at both end portions of the seat cushion frame on a floor in a lateral direction of the vehicle, a guide member including a guide groove extending between the seating and retracted positions, a slide member arranged at the seat cushion frame and sliding along the guide groove, a head rest retaining device retaining the head rest in the stationary position, a rotary member supported by the seat back frame and rotated by the slide member, and an interlocking device arranged between the rotary member and the head rest retaining device and releasing the head rest from the stationary position in accordance with a rotation of the rotary member.Type: ApplicationFiled: August 20, 2010Publication date: February 24, 2011Applicants: AISIN SEIKI KABUSHIKI KAISHA, TOYOTA BOSHOKU KABUSHIKI KAISHAInventors: Motohiro KOKUBO, Masaki Hatano, Hideki Fujisawa, Kazuya Iwasa, Hiroaki Hayahara
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Publication number: 20100244270Abstract: A semiconductor device includes: a component substrate of a semiconductor device; electrode pads provided on one surface of the component substrate; a support plate material reinforcing the component substrate; via holes made in the support plate material; a conducting material filled in the via holes; and a joining member interposed between the electrode pads and the conducting material and joining the component substrate and the support plate material.Type: ApplicationFiled: March 19, 2010Publication date: September 30, 2010Applicant: SONY CORPORATIONInventors: Hiroshi Asami, Masaki Hatano, Akihiro Morimoto
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Patent number: 7691672Abstract: The present invention provides a substrate treating method including the steps of joining a one-side surface of a substrate to be treated to a support substrate, treating the substrate to be treated in the condition where the substrate to be treated is supported by the support substrate, and removing the support substrate from the substrate to be treated. The step of joining the substrate to be treated to the support substrate includes melting a joint bump formed on the substrate to be treated so as to join the substrate to be treated to the support substrate, and the step of removing the support substrate from the substrate to be treated includes polishing the support substrate so as to remove the support substrate.Type: GrantFiled: April 30, 2007Date of Patent: April 6, 2010Assignee: Sony CorporationInventors: Masaki Hatano, Hiroshi Asami
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Publication number: 20080283951Abstract: A semiconductor device includes a semiconductor substrate having a first electronic circuit and a second electronic circuit formed on an active surface, a pad electrode formed on the active surface by being connected to the first electronic circuit and/or the second electronic circuit, a first opening formed to some point along a depth of the semiconductor substrate toward the pad electrode from a surface opposite to the active surface of the semiconductor substrate, a second opening formed so as to reach the pad electrode from a bottom surface of the first opening, an insulating layer formed by covering sidewall surfaces of the first opening and the second opening, a conductive layer formed by covering at least an inner wall surface of the insulating layer and a bottom surface of the second opening, a third opening formed to some point along the depth of the semiconductor substrate from the surface opposite to the active surface of the semiconductor substrate, and a heat insulator imbedded in the third openiType: ApplicationFiled: April 8, 2008Publication date: November 20, 2008Applicant: Sony CorporationInventors: Yoshihiro Nabe, Masaki Hatano, Hiroshi Asami, Akihiro Morimoto
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Patent number: 7402901Abstract: The present invention provides a semiconductor device that is inexpensive and can suppress signal transmission delay, and a manufacturing method thereof. The semiconductor device includes: a plurality of semiconductor chips; a semiconductor substrate that has, on the same surface thereof, a chip-to-chip interconnection for electrically connecting the plurality of semiconductor chips to each other, and a plurality of chip-connection pads connected to the chip-to-chip interconnection; and a wiring board that has a plurality of lands of which pitch is larger than a pitch of the chip-connection pads, wherein a major surface of each of the plurality of semiconductor chips is connected to the chip-connection pads via a first connector so that the plurality of semiconductor chips are mounted on the semiconductor substrate, and an external-connection pad is formed on the major surface other than a region facing the semiconductor substrate, and is connected to the land on the wiring board via a second connector.Type: GrantFiled: March 2, 2006Date of Patent: July 22, 2008Assignee: Sony CorporationInventors: Masaki Hatano, Yuji Takaoka
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Publication number: 20080138932Abstract: The present invention provides a semiconductor device that is inexpensive and can suppress signal transmission delay, and a manufacturing method thereof. The semiconductor device includes: a plurality of semiconductor chips; a semiconductor substrate that has, on the same surface thereof, a chip-to-chip interconnection for electrically connecting the plurality of semiconductor chips to each other, and a plurality of chip-connection pads connected to the chip-to-chip interconnection; and a wiring board that has a plurality of lands of which pitch is larger than a pitch of the chip-connection pads, wherein a major surface of each of the plurality of semiconductor chips is connected to the chip-connection pads via a first connector so that the plurality of semiconductor chips are mounted on the semiconductor substrate, and an external-connection pad is formed on the major surface other than a region facing the semiconductor substrate, and is connected to the land on the wiring board via a second connector.Type: ApplicationFiled: January 9, 2008Publication date: June 12, 2008Applicant: SONY CORPORATIONInventors: Masaki Hatano, Yuji Takaoka
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Publication number: 20070287265Abstract: The present invention provides a substrate treating method including the steps of joining a one-side surface of a substrate to be treated to a support substrate, treating the substrate to be treated in the condition where the substrate to be treated is supported by the support substrate, and removing the support substrate from the substrate to be treated. The step of joining the substrate to be treated to the support substrate includes melting a joint bump formed on the substrate to be treated so as to join the substrate to be treated to the support substrate, and the step of removing the support substrate from the substrate to be treated includes polishing the support substrate so as to remove the support substrate.Type: ApplicationFiled: April 30, 2007Publication date: December 13, 2007Inventors: Masaki Hatano, Hiroshi Asami
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Patent number: 7135378Abstract: A semiconductor device of MCM type allowing high-density assembly and a process of fabricating the same is provided. There are provided semiconductor chips mounted on a supporting substrate and incrusted in an insulation film on the supporting substrate and wiring formed in the insulation film so as to connect to each semiconductor chip through connection holes provided in the insulation film. Then, an interlayer dielectric covers such wiring that is connected to an upper layer wiring, through connection holes provided in such interlayer dielectric. In addition, an upper layer insulation film covers the upper layer wiring, and an electrode, connected to such upper layer wiring through another connection hole, is provided on such upper layer insulation film.Type: GrantFiled: November 21, 2003Date of Patent: November 14, 2006Assignee: Sony CorporationInventors: Yuji Takaoka, Yukihiro Kamide, Teruo Hirayama, Masaki Hatano
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Publication number: 20060226527Abstract: The present invention provides a semiconductor device that is inexpensive and can suppress signal transmission delay, and a manufacturing method thereof. The semiconductor device includes: a plurality of semiconductor chips; a semiconductor substrate that has, on the same surface thereof, a chip-to-chip interconnection for electrically connecting the plurality of semiconductor chips to each other, and a plurality of chip-connection pads connected to the chip-to-chip interconnection; and a wiring board that has a plurality of lands of which pitch is larger than a pitch of the chip-connection pads, wherein a major surface of each of the plurality of semiconductor chips is connected to the chip-connection pads via a first connector so that the plurality of semiconductor chips are mounted on the semiconductor substrate, and an external-connection pad is formed on the major surface other than a region facing the semiconductor substrate, and is connected to the land on the wiring board via a second connector.Type: ApplicationFiled: March 2, 2006Publication date: October 12, 2006Inventors: Masaki Hatano, Yuji Takaoka
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Publication number: 20040113245Abstract: A semiconductor device of MCM type allowing high-density assembly and a process of fabricating the same is provided.Type: ApplicationFiled: November 21, 2003Publication date: June 17, 2004Inventors: Yuji Takaoka, Yukihiro Kamide, Teruo Hirayama, Masaki Hatano
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Publication number: 20020004257Abstract: A semiconductor device of MCM type allowing high-density assembly and a process of fabricating the same is provided.Type: ApplicationFiled: March 23, 2001Publication date: January 10, 2002Inventors: Yuji Takaoka, Yukihiro Kamide, Teruo Hirayama, Masaki Hatano
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Patent number: 5849631Abstract: A method of manufacturing a semiconductor device includes the steps of: patterning a first passivation film on a semiconductor substrate; patterning a ball limiting metal film; patterning a second passivation film; performing a heat-treatment for hardening the second passivation film and annealing the ball limiting metal film; patterning a bump forming metal film; and wet-back processing the bump forming metal film. In this method, the heat-treatment may be performed in an atmosphere having an oxygen concentration of 50 ppm or less at a temperature of from 300.degree. to 400.degree. C. for 10 to 30 minutes. Additionally, at least one of the first and second passivation films may be a polyimide film, and the ball limiting metal film may has a three layer structure of a Ti layer, a Cu layer and an Au layer laminated from the bottom in this order.Type: GrantFiled: July 17, 1996Date of Patent: December 15, 1998Assignee: Sony CorporationInventors: Natsuya Ishikawa, Kiyoshi Hasegawa, Masaki Hatano
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Patent number: D1022418Type: GrantFiled: October 6, 2022Date of Patent: April 16, 2024Assignee: ASICS CORPORATIONInventors: Genki Hatano, Kenta Tateno, Waka Inoue, Shingo Takahashi, Masaki Oohara, Norihiko Taniguchi