Abstract: A semiconductor device including a semiconductor layer, a drain region formed at a surface region of the semiconductor layer, and a source/gate region including a source region and a gate region, which are alternatively arranged so as to be electrically connected to each other. The device further includes a resistive field plate that is disposed on the semiconductor layer between the drain region and the source/gate region and spirally wound in a top view. The field plate including an innermost peripheral portion electrically connected to the drain region and an outermost peripheral portion electrically connected to ground. An outermost peripheral ground conductor film is disposed on the semiconductor layer between the outermost peripheral portion of the field plate and the source/gate region. Additionally, a second ground conductor film is disposed on the semiconductor layer between the outermost peripheral portion of the field plate and the outermost ground conductor film.

Abstract: A semiconductor device including a semiconductor layer, a drain region formed at a surface region of the semiconductor layer, and a source/gate region including a source region and a gate region, which are alternatively arranged so as to be electrically connected to each other. The device further includes a resistive field plate that is disposed on the semiconductor layer between the drain region and the source/gate region and spirally wound in a top view. The field plate including an innermost peripheral portion electrically connected to the drain region and an outermost peripheral portion electrically connected to ground. An outermost peripheral ground conductor film is disposed on the semiconductor layer between the outermost peripheral portion of the field plate and the source/gate region. Additionally, a second ground conductor film is disposed on the semiconductor layer between the outermost peripheral portion of the field plate and the outermost ground conductor film.

Abstract: A semiconductor device of the present invention includes vertical double diffused MOS transistor. A gate electrode of the vertical double diffused MOS transistor is disposed within a trench formed on a semiconductor substrate and projects from a surface of the semiconductor substrate. On a side surface of the gate electrode, a side wall is formed. On the surface of the semiconductor substrate and a surface of the gate electrode, a metal silicide film is formed.

Abstract: The semiconductor device of the present invention includes a first conductive type semiconductor layer; a second conductive type source region formed in a surface layer portion of the semiconductor layer; a groove formed by digging in the source region from a surface thereof; an insulating film laminated on the semiconductor layer to cover a surface of the semiconductor layer; a contact hole penetrating through the insulating film in a layer thickness direction at least at a position facing the groove; a wiring formed on the insulating film; and a contact plug embedded in the contact hole so that a bottom portion thereof enters the groove to electrically connect the wiring and the source.

Abstract: The semiconductor device of the present invention includes a first conductive type semiconductor layer; a second conductive type source region formed in a surface layer portion of the semiconductor layer; a groove formed by digging in the source region from a surface thereof; an insulating film laminated on the semiconductor layer to cover a surface of the semiconductor layer; a contact hole penetrating through the insulating film in a layer thickness direction at least at a position facing the groove; a wiring formed on the insulating film; and a contact plug embedded in the contact hole so that a bottom portion thereof enters the groove to electrically connect the wiring and the source.

Abstract: The semiconductor device of the present invention includes a first conductive type semiconductor layer; a second conductive type source region formed in a surface layer portion of the semiconductor layer; a groove formed by digging in the source region from a surface thereof; an insulating film laminated on the semiconductor layer to cover a surface of the semiconductor layer; a contact hole penetrating through the insulating film in a layer thickness direction at least at a position facing the groove; a wiring formed on the insulating film; and a contact plug embedded in the contact hole so that a bottom portion thereof enters the groove to electrically connect the wiring and the source.

Abstract: The semiconductor device of the present invention includes a first conductive type semiconductor layer; a second conductive type source region formed in a surface layer portion of the semiconductor layer; a groove formed by digging in the source region from a surface thereof; an insulating film laminated on the semiconductor layer to cover a surface of the semiconductor layer; a contact hole penetrating through the insulating film in a layer thickness direction at least at a position facing the groove; a wiring formed on the insulating film; and a contact plug embedded in the contact hole so that a bottom portion thereof enters the groove to electrically connect the wiring and the source.

Abstract: A semiconductor device of the present invention includes vertical double diffused MOS transistor. A gate electrode of the vertical double diffused MOS transistor is disposed within a trench formed on a semiconductor substrate and projects from a surface of the semiconductor substrate. On a side surface of the gate electrode, a side wall is formed. On the surface of the semiconductor substrate and a surface of the gate electrode, a metal silicide film is formed.