Abstract: A remote control manipulator system includes: a manipulator being controlled by an operator remotely to handle an object; a stereoscopic display device that displays a right-eye image and a left-eye image so as to be stereoscopically viewed; a model image generator that generates a model image being an image of an integrated three-dimensional model viewed from a viewpoint designated by the operator, the integrated three-dimensional model being a three-dimensional model obtained by integrating the manipulator model and a surrounding environment model being generated by performing image processing on the right-eye image and the left-eye image and being a three-dimensional model of the object and a surrounding environment thereof; and a model image display device that displays the model image and is configured to be able to be viewed by the operator switching between the stereoscopic display device and the model image display device through moving the head of the operator.

Abstract: A semiconductor integrated circuit device is configured using a DRAM and an SRAM between which data transfer is performed by way of a data transfer circuit using data transfer bus lines. Herein, the DRAM is divided into at least two DRAM arrays, each of which contains a number of columns each consisting of memory cells. In addition, the columns are arranged in mixture in connection with external I/O terminals respectively in such a way that columns respectively containing memory cells which are simultaneously subjected to read operations within a same cycle are arranged not to adjoin each other. Thus, it is possible to reduce a probability in which multiple memory cells which are simultaneously subjected to read operations within the same cycle exist within a range of an area under influence of charged particles, which are produced locally due to neutrons.

Abstract: In order to form a node contact hole in an inter-level insulating structure between bit lines spaced by the minimum length defined in design rules, a preliminary node contact hole is firstly formed in the inter-level insulating structure between the bit lines in such a manner as to have a length greater than the minimum length, and an insulating side wall spacer is formed on the inner surface defining the preliminary node contact hole so as to form the node contact hole having a length less than the minimum length, thereby forming a quite narrow node contact hole without a short-circuit between the bit lines and a storage node electrode.

Abstract: A data input/output circuit includes a 32-bit reversible shift register (1) which includes four 8-bit reversible shift registers (2-5). Input gate circuits (6, 7) selectively apply data being inputted in a bit-serial fashion from an external to the 8-bit reversible shift registers (3, 4), and output gate circuits (8-12) selectively output data being stored in arbitrary stages of the 32-bit reversible shift register (1) in a bit-serial fashion. Input latches (13-15) and output latches (16-18) each of which is an 8-bit latch are connected to the respective 8-bit reversible shift registers (2-4) and a data bus (19). The input latches (13-15) hold the data being stored in the 8-bit reversible shift registers (2-4) and send the same onto the data bus (19) in a bit-parallel fashion, and the output latches (16-18) hold the data being sent from the data bus (19) and preset the same into the 8-bit reversible shift registers (2-4) in a bit-parallel fashion.