Patents by Inventor Masaki Naganuma
Masaki Naganuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11009523Abstract: A probe is a probe having a substantially bar-like shape and includes a distal end portion with a substantially columnar shape adapted to be in contact with an inspection point provided on a device under test, a base end portion with a substantially columnar shape on an opposite side of the distal end portion, and a main body portion formed in a flat ribbon shape and extended to connect the distal end portion to the base end portion. The distal end portion is provided with a distal end surface inclined relative to and intersecting with an axial center of the probe.Type: GrantFiled: July 7, 2019Date of Patent: May 18, 2021Assignees: Nidec-Read Corporation, Nidec SV Probe Pte. Ltd.Inventors: Minoru Kato, Tadakazu Miyatake, Akio Hayashi, Masaki Naganuma, Matthias Joseph Chin Chieh Chia, Cheng Ghee Ong, Raminderjit Singh
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Publication number: 20200018779Abstract: A probe is a probe having a substantially bar-like shape and includes a distal end portion with a substantially columnar shape adapted to be in contact with an inspection point provided on a device under test, a base end portion with a substantially columnar shape on an opposite side of the distal end portion, and a main body portion formed in a flat ribbon shape and extended to connect the distal end portion to the base end portion. The distal end portion is provided with a distal end surface inclined relative to and intersecting with an axial center of the probe.Type: ApplicationFiled: July 7, 2019Publication date: January 16, 2020Applicants: Nidec-Read Corporation, Nidec SV Probe Pte. Ltd.Inventors: Minoru KATO, Tadakazu MIYATAKE, Akio HAYASHI, Masaki NAGANUMA, Matthias Joseph Chin Chieh Chia, Cheng Ghee Ong, Raminderjit Singh
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Patent number: 9101075Abstract: There is provided a substrate with built-in component, including a metal core layer having a cavity for storing a component; a wiring layer that is laminated on the core layer and has a plurality of vias for an interlayer connection, the vias being formed at regions opposing to the cavity; and an electronic component including a plurality of terminals electrically connected to the plurality of vias, and a component body that is stored in the cavity and has a support surface for supporting the plurality of terminals, the plurality of terminals being disposed eccentrically from a center of the support surface to a first direction, and the component body being disposed eccentrically from a center of the cavity to a second direction opposite to the first direction.Type: GrantFiled: December 9, 2013Date of Patent: August 4, 2015Assignee: Taiyo Yuden Co., LtdInventors: Masaki Naganuma, Kazuaki Ida, Tatsuro Sawatari, Hiroshi Nakamura
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Patent number: 9007782Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.Type: GrantFiled: December 10, 2014Date of Patent: April 14, 2015Assignee: Taiyo Yuden Co., Ltd.Inventors: Tatsuro Sawatari, Yuichi Sugiyama, Hiroshi Nakamura, Masaki Naganuma, Tetsuo Saji
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Publication number: 20150098203Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.Type: ApplicationFiled: December 10, 2014Publication date: April 9, 2015Applicant: TAIYO YUDEN CO., LTD.Inventors: Tatsuro SAWATARI, Yuichi SUGIYAMA, Hiroshi NAKAMURA, Masaki NAGANUMA, Tetsuo SAJI
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Publication number: 20150070862Abstract: There is provided a substrate with built-in component, including a metal core layer having a cavity for storing a component; a wiring layer that is laminated on the core layer and has a plurality of vias for an interlayer connection, the vias being formed at regions opposing to the cavity; and an electronic component including a plurality of terminals electrically connected to the plurality of vias, and a component body that is stored in the cavity and has a support surface for supporting the plurality of terminals, the plurality of terminals being disposed eccentrically from a center of the support surface to a first direction, and the component body being disposed eccentrically from a center of the cavity to a second direction opposite to the first direction.Type: ApplicationFiled: December 9, 2013Publication date: March 12, 2015Applicant: Taiyo Yuden Co., Ltd.Inventors: Masaki NAGANUMA, Kazuaki IDA, Tatsuro SAWATARI, Hiroshi NAKAMURA
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Publication number: 20150068795Abstract: A substrate with built-in electronic component includes an electronic component, a first wiring layer, a second wiring layer, a via, and a core base-material. The first wiring layer has a first wiring portion. The second wiring layer has a second wiring portion. The via is configured to electrically connect the first wiring portion and the second wiring portion. The core base-material has a metal layer, at least one first storage portion, and a second storage portion, the metal layer being disposed between the first wiring layer and the second wiring layer, the at least one first storage portion being formed in the metal layer, the at least one first storage portion storing the electronic component, the second storage portion being formed on an outside of the first storage portion integrally with the first storage portion, the second storage portion storing the via.Type: ApplicationFiled: December 11, 2013Publication date: March 12, 2015Applicant: Taiyo Yuden Co., Ltd.Inventors: Kazuaki IDA, Masashi MIYAZAKI, Tatsuro SAWATARI, Hiroshi NAKAMURA, Masaki NAGANUMA
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Patent number: 8923009Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.Type: GrantFiled: June 4, 2013Date of Patent: December 30, 2014Assignee: Taiyo Yuden Co., Ltd.Inventors: Tatsuro Sawatari, Yuichi Sugiyama, Hiroshi Nakamura, Masaki Naganuma, Tetsuo Saji
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Publication number: 20140133120Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.Type: ApplicationFiled: June 4, 2013Publication date: May 15, 2014Inventors: Tatsuro SAWATARI, Yuichi SUGIYAMA, Hiroshi NAKAMURA, Masaki NAGANUMA, Tetsuo SAJI
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Publication number: 20140126156Abstract: In a circuit module, a multilayer substrate has a core layer made of a metal, a filter device is stored in a storage portion of the core layer, the filter device and a power amp IC are arranged such that a parallel projection region of the filter device is completely covered by a parallel projection region of the power amp IC, and the power amp IC is connected to the upper surface (one surface in the thickness direction) of the core layer through a plurality of thermal vias provided in the multilayer substrate.Type: ApplicationFiled: April 23, 2013Publication date: May 8, 2014Applicant: TAIYO YUDEN CO., LTD.Inventors: Masaki NAGANUMA, Hiroshi NAKAMURA
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Patent number: 6249186Abstract: An input matching circuit is provided having the output impedance-frequency characteristics wherein the output impedance shows a value approximately equal to that of the gate input impedance of the FET at the frequency of the objective signal to be amplified, and the output impedance shows a value not more than twice the gate input impedance of the FET at least at the entire frequencies from the frequency of the objective signal to be amplified through twice the frequency of the objective signal to be amplified so that the matching between the input previous stage circuit and the gate of the FET can be secured. Thereby, a high-frequency power amplifier circuit and a high-frequency power amplifier module, which can suppress the occurrence of distortion, perform stably, and get miniaturized, are configured.Type: GrantFiled: April 9, 1999Date of Patent: June 19, 2001Assignee: Taiyo Yuden Co., Ltd.Inventors: Hitoshi Ebihara, Masaki Naganuma, Masanobu Kaneko, Fumitaka Iizuka