Patents by Inventor Masaki Nakayama

Masaki Nakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200371060
    Abstract: The present invention provides a method for accurately measuring a blood component despite uneven distribution of blood introduced into a capillary. The measurement method according to the present invention is characterized in that a plurality of electrode systems for measuring the hematocrit are provided in a capillary of a biosensor to measure the hematocrit at different positions in the capillary. By measuring the hematocrit at the plurality of positions in the capillary as described above, the hematocrit can be measured more accurately despite uneven distribution of blood introduced into the capillary.
    Type: Application
    Filed: August 3, 2018
    Publication date: November 26, 2020
    Inventors: Masaki FUJIWARA, Yoshifumi TAKAHARA, Takaaki FUJII, Junko NAKAYAMA, Setsuko YANO, Fuminori KUTSUNA
  • Publication number: 20200367363
    Abstract: A substrate connection structure includes a wiring substrate, a base having an insulating property, a first terminal portion, and a second. terminal portion, in which a plurality of first terminal portions are disposed side by side in a first array direction, and extend by being inclined relative to the first array direction so that extended lines of the first terminal portions in an extension direction cross at a first intersection, a plurality of second terminal portions are disposed side by side in a second array direction, and extend by being inclined relative to the second array direction so that extended lines of the second terminal portions in an extension direction cross at a second intersection, and a first intersection direction directed from a first. center position to the first intersection and a second intersection direction directed from a second center portion to the second intersection are forward directions.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 19, 2020
    Inventor: MASAKI NAKAYAMA
  • Publication number: 20200341379
    Abstract: A pattern drawing device is provided with: a first cylindrical lens on which a beam from a light source device is incident and which has an anisotropic refractive power for converging, in a sub-scanning direction orthogonal to a main scanning direction, the beam traveling toward a reflection surface of a polygon mirror; an f? lens system for causing the beam having been deflected by the reflection surface of the polygon mirror to be incident thereon, and for condensing the beam as a spot light on a surface of an object to be irradiated; and a second cylindrical lens having an anisotropic refractive power for converging, in the sub-scanning direction, the beam traveling toward the surface after being emitted from the f? lens system.
    Type: Application
    Filed: April 23, 2020
    Publication date: October 29, 2020
    Applicant: NIKON CORPORATION
    Inventors: Masaki KATO, Shuichi NAKAYAMA
  • Publication number: 20200238666
    Abstract: There is provided an interlayer film for laminated glass with which the occurrence of a poor appearance due to white cloudiness in laminated glass can be suppressed even though the interlayer film is provided with a layer containing silver. The interlayer film for laminated glass according to the present invention includes a first layer containing silver and a second layer containing a polyvinyl acetal resin, the second layer is arranged on a first surface side of the first layer, the second layer contains a compound having a group in which a carbon atom, an oxygen atom, or a hydrogen atom is bonded to a nitrogen atom, and the compound having a group in which a carbon atom, an oxygen atom, or a hydrogen atom is bonded to a nitrogen atom is a compound having a piperidine structure or is a hindered amine light stabilizer.
    Type: Application
    Filed: September 28, 2016
    Publication date: July 30, 2020
    Inventors: Shougo Yoshida, Masaki Yamamoto, Kazuhiko Nakayama, Kouhei Yamaguchi
  • Publication number: 20200168434
    Abstract: Described herein is a technique capable of suppressing variations or deterioration in a processing rate between a plurality of substrates due to temperature. According to one aspect of the technique of the present disclosure, there is provided a substrate processing apparatus including: a process vessel constituting at least a part of a process chamber where a substrate is processed; a plasma generator comprising a coil provided to be wound around an outer periphery of the process vessel and a high frequency power supply configured to supply high frequency power to the coil; a substrate support provided in the process chamber and below a lower end of the coil; a heater provided in the substrate support; and a temperature sensor configured to measure a temperature of a portion of the process vessel located above an upper end of the coil.
    Type: Application
    Filed: January 30, 2020
    Publication date: May 28, 2020
    Applicant: KOKUSAI ELECTRIC CORPORATION
    Inventors: Masaki MUROBAYASHI, Koichiro HARADA, Hiroto IGAWA, Teruo YOSHINO, Masanori NAKAYAMA
  • Patent number: 10599081
    Abstract: An image forming apparatus includes a latent image bearer to bear a latent image, a potential sensor having a vibrator driven by a drive frequency to detect a surface potential of the latent image bearer, a developer bearer to bear developer that develops the latent image on the latent image bearer, and a power supply to apply a superimposed voltage obtained by superimposing an alternating voltage on a direct current voltage on the developer bearer. The frequency of the alternating voltage is not a multiple of the drive frequency and is a value obtained by adding a predetermined value to a multiple of the driving frequency.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: March 24, 2020
    Assignee: Ricoh Company, Ltd.
    Inventors: Masashi Tachi, Takuma Higa, Masayoshi Nakayama, Masaki Sukesako, Tomohide Takenaka, Yuichi Aizawa, Kazuaki Kamihara, Keita Sone
  • Publication number: 20200077333
    Abstract: A sensor device includes: a sensor that detects environment information; a battery that supplies electric power to the sensor device; and a connector that detachably attaches to an auxiliary battery for supplying electric power to the sensor device. The sensor device transmits the detected environment information to another sensor device, and when the auxiliary battery is not attached, the sensor device operates with electric power supply from the battery, and when the auxiliary battery is attached, the sensor device operates with electric power supply from either the battery or the auxiliary battery.
    Type: Application
    Filed: March 13, 2018
    Publication date: March 5, 2020
    Applicant: Fujikura Ltd.
    Inventors: Hiroyuki Kito, Katsuhiko Iwatsu, Masaki Nakayama, Yasuyuki Seki, Taku Taguchi, Kenta Kaneeda
  • Patent number: 10552433
    Abstract: A method for evaluating annotation quality is provided. The method may include obtaining annotation information associated with a plurality of annotators and a plurality of data elements including a plurality of annotation entries corresponding to at least one data element and entered based on an annotation guideline, determining a quality rating for the annotation guideline based on a comparison between a first value associated with the plurality of annotators and the plurality of data elements and a second value associated with any disparity among the plurality of annotation entries, determining a proficiency rating for an annotator from the plurality of annotators based on a comparison between a third value associated with annotation entries by the annotator and the second value, and generating a report based on the quality rating and the proficiency rating.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: February 4, 2020
    Assignee: International Business Machines Corporation
    Inventors: Masaki Komedani, Ken Kumagai, Takuma Murakami, Akihiro Nakayama
  • Patent number: 10545971
    Abstract: A method for evaluating annotation quality is provided. The method may include obtaining annotation information associated with a plurality of annotators and a plurality of data elements including a plurality of annotation entries corresponding to at least one data element and entered based on an annotation guideline, determining a quality rating for the annotation guideline based on a comparison between a first value associated with the plurality of annotators and the plurality of data elements and a second value associated with any disparity among the plurality of annotation entries, determining a proficiency rating for an annotator from the plurality of annotators based on a comparison between a third value associated with annotation entries by the annotator and the second value, and generating a report based on the quality rating and the proficiency rating.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: January 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Masaki Komedani, Ken Kumagai, Takuma Murakami, Akihiro Nakayama
  • Publication number: 20190380198
    Abstract: A circuit board includes a first row terminal group including terminal parts aligned in a predetermined direction and a second row terminal group including terminal parts aligned in parallel with and arranged in a zig-zag pattern with respect to the first row terminal group. The first row terminal group includes first row projecting terminal parts protruding toward the second row terminal group further than another terminal parts included in the first row terminal group, the second row terminal group includes second row projecting terminal parts projecting toward the first row terminal group further than another terminal parts included in the second row terminal group, and the first row projecting terminal parts and the second row projecting terminal parts are overlapped with and spaced apart from each other in the predetermined direction.
    Type: Application
    Filed: June 6, 2019
    Publication date: December 12, 2019
    Inventor: MASAKI NAKAYAMA
  • Patent number: 10499495
    Abstract: A circuit board includes a first row terminal group including terminal parts aligned in a predetermined direction and a second row terminal group including terminal parts aligned in parallel with and arranged in a zig-zag pattern with respect to the first row terminal group. The first row terminal group includes first row projecting terminal parts protruding toward the second row terminal group further than another terminal parts included in the first row terminal group, the second row terminal group includes second row projecting terminal parts projecting toward the first row terminal group further than another terminal parts included in the second row terminal group, and the first row projecting terminal parts and the second row projecting terminal parts are overlapped with and spaced apart from each other in the predetermined direction.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: December 3, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Masaki Nakayama
  • Publication number: 20190314721
    Abstract: Proposed is a controller which can suppress an amount of protrusion of an operation member from an external surface of a chassis while operability of the operation member is maintained. A controller including a chassis, and an operation member which is slidable along an extension direction of the chassis with a predetermined position as a reference, and is rotatable in a circumferential direction of the chassis with the predetermined position as the reference, and at least a part of which is fitted into a recess section provided in an external surface of the chassis.
    Type: Application
    Filed: October 17, 2017
    Publication date: October 17, 2019
    Applicant: Sony Interactive Entertainment Inc.
    Inventors: Tetsunori Nakayama, Akichika Tanaka, Masaki Hanzawa, Yujin Morisawa, Alexis Andre
  • Publication number: 20190213195
    Abstract: A method for evaluating annotation quality is provided. The method may include obtaining annotation information associated with a plurality of annotators and a plurality of data elements including a plurality of annotation entries corresponding to at least one data element and entered based on an annotation guideline, determining a quality rating for the annotation guideline based on a comparison between a first value associated with the plurality of annotators and the plurality of data elements and a second value associated with any disparity among the plurality of annotation entries, determining a proficiency rating for an annotator from the plurality of annotators based on a comparison between a third value associated with annotation entries by the annotator and the second value, and generating a report based on the quality rating and the proficiency rating.
    Type: Application
    Filed: March 15, 2019
    Publication date: July 11, 2019
    Inventors: Masaki Komedani, Ken Kumagai, Takuma Murakami, Akihiro Nakayama
  • Publication number: 20190213196
    Abstract: A method for evaluating annotation quality is provided. The method may include obtaining annotation information associated with a plurality of annotators and a plurality of data elements including a plurality of annotation entries corresponding to at least one data element and entered based on an annotation guideline, determining a quality rating for the annotation guideline based on a comparison between a first value associated with the plurality of annotators and the plurality of data elements and a second value associated with any disparity among the plurality of annotation entries, determining a proficiency rating for an annotator from the plurality of annotators based on a comparison between a third value associated with annotation entries by the annotator and the second value, and generating a report based on the quality rating and the proficiency rating.
    Type: Application
    Filed: March 15, 2019
    Publication date: July 11, 2019
    Inventors: Masaki Komedani, Ken Kumagai, Takuma Murakami, Akihiro Nakayama
  • Publication number: 20190157625
    Abstract: The disclosure provides a production method for an EL device including a base layer, a light-emitting element layer, a plurality of terminals, and an electronic circuit board mounted on the plurality of terminals; the production method including: a preparation step of directly or indirectly applying heat and pressure to a prescribed region including the plurality of terminals without any overlap between the plurality of terminals and the electronic circuit board; and a thermocompression bonding step of thermocompression-bonding the plurality of terminals and the electronic circuit board.
    Type: Application
    Filed: February 28, 2017
    Publication date: May 23, 2019
    Inventor: Masaki NAKAYAMA
  • Patent number: 10224305
    Abstract: In order to inhibit defective connection between a bump of a semiconductor chip and an electrode pad of a substrate, a semiconductor device includes a substrate provided on a surface with a plurality of electrode pads 15, a semiconductor chip 20 provided on a surface with a plurality of bumps 21 substantially equal in size, and an anisotropic conductive film 30 interposed between the plurality of bumps 21 and the plurality of electrode pads 15 and electrically connecting each of the bumps 21 and corresponding one of the electrode pads 15. The plurality of electrode pads 15 includes a plurality of first electrode pads 15A positioned closest to an end 25 of the semiconductor chip 20, and a plurality of second electrode pads 15B positioned inside the plurality of first electrode pads 15A on the semiconductor chip 20. Each of the second electrode pads 15B is larger in area than each of the first electrode pads 15A.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: March 5, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masaki Nakayama, Motoji Shiota, Takashi Matsui, Yasuhiko Tanaka, Hiroki Miyazaki, Seiji Muraoka
  • Patent number: 9995977
    Abstract: An array circuit board 11B includes a glass substrate, an IC chip 20, two ACFs 30, and a resin film 32. The IC chip 20 is disposed on the glass substrate. The ACFs 30 are disposed between the glass substrate and the IC chip 20 for electrically connecting the glass substrate and the IC chip 20 together. The ACFs 30 are separated from each other. The resin film 32 is made of resin material having cure shrinkage smaller than the ACFs 30 and disposed to fill a gap between the ACFs 30 adjacent to each other between the glass substrate and the IC chip 20.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: June 12, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masaki Nakayama, Motoji Shiota, Takashi Matsui, Yasuhiko Tanaka, Hiroki Miyazaki
  • Publication number: 20180158795
    Abstract: In order to inhibit defective connection between a bump of a semiconductor chip and an electrode pad of a substrate, a semiconductor device includes a substrate provided on a surface with a plurality of electrode pads 15, a semiconductor chip 20 provided on a surface with a plurality of bumps 21 substantially equal in size, and an anisotropic conductive film 30 interposed between the plurality of bumps 21 and the plurality of electrode pads 15 and electrically connecting each of the bumps 21 and corresponding one of the electrode pads 15. The plurality of electrode pads 15 includes a plurality of first electrode pads 15A positioned closest to an end 25 of the semiconductor chip 20, and a plurality of second electrode pads 15B positioned inside the plurality of first electrode pads 15A on the semiconductor chip 20. Each of the second electrode pads 15B is larger in area than each of the first electrode pads 15A.
    Type: Application
    Filed: May 18, 2016
    Publication date: June 7, 2018
    Inventors: MASAKI NAKAYAMA, MOTOJI SHIOTA, TAKASHI MATSUI, YASUHIKO TANAKA, HIROKI MIYAZAKI, SEIJI MURAOKA
  • Patent number: 9973832
    Abstract: A sensor node includes a power generator, a power storage, a transmitter having an environment sensor, a transmission controller, and a transmission unit, a first switcher provided between the transmission controller and the power storage, and a second switcher provided between the transmission unit and the power storage. In a case where the storage capacity of the power storage decreases to a first threshold or less and then the storage capacity increases, when the storage capacity reaches the first threshold, the first switcher is brought into an on-state and the first switcher supplies electric power to the transmission controller. When the storage capacity reaches a second threshold higher than the first threshold, the second switcher is brought into an on-state and the second switcher supplies electric power to the transmission unit.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: May 15, 2018
    Assignee: FUJIKURA LTD.
    Inventors: Yuji Yamada, Kenjiro Yano, Masaki Nakayama, Taku Taguchi, Hidetoshi Akita
  • Publication number: 20170131586
    Abstract: An array circuit board 11B includes a glass substrate, an IC chip 20, two ACFs 30, and a resin film 32. The IC chip 20 is disposed on the glass substrate. The ACFs 30 are disposed between the glass substrate and the IC chip 20 for electrically connecting the glass substrate and the IC chip 20 together. The ACFs 30 are separated from each other. The resin film 32 is made of resin material having cure shrinkage smaller than the ACFs 30 and disposed to fill a gap between the ACFs 30 adjacent to each other between the glass substrate and the IC chip 20.
    Type: Application
    Filed: June 19, 2015
    Publication date: May 11, 2017
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masaki NAKAYAMA, Motoji Shikota, Takashi Matsui, Yashuhiko Tanaka, Hiroki Miyazaki