Patents by Inventor Masaki Terazono

Masaki Terazono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070209173
    Abstract: A laminated piezoelectric device obtained by alternately laminating the piezoelectric layers containing Pb and the conducting layers containing palladium as a conducting component, wherein the piezoelectric layer formed between the two conducting layers has layer regions where Pb and Pd are mixed together in the interfacial portions thereof relative to the conducting layers, the layer regions having a thickness of not larger than 3% of the thickness of the piezoelectric layer. The laminated piezoelectric device is formed by co-firing the Pb-containing piezoelectric layers and the palladium (Pd)-containing layers, the piezoelectric layers therein having a large insulation resistance and good piezoelectric characteristics.
    Type: Application
    Filed: December 17, 2004
    Publication date: September 13, 2007
    Applicant: KYOCERA CORPORATION
    Inventors: Takaaki Hira, Takeshi Okamura, Masaki Terazono, Hirotaka Tsuyoshi, Ryuusuke Tsuyoshi, Katsushi Sakaue
  • Publication number: 20070080612
    Abstract: A multi-layer piezoelectric element of high reliability and high durability, that undergoes smaller variations in the amount of displacement even when used under a high electric field and high pressure and is subject to less variations in the amount of displacement even when used in continuous operation over a long period of time is provided. The multi-layer piezoelectric element comprises a stack formed by stacking piezoelectric layers and internal electrodes alternately one on another and external electrodes formed on a first side face and on a second side face of the stack, wherein one of the adjacent internal electrodes is connected to the external electrode on the first side face and the other internal electrode is connected to the external electrode formed on the second side face, while the ratio of change in the amount of displacement of the element after undergoing continuous operation of 1×109 cycles or more to the initial device dimension is not larger than 5%.
    Type: Application
    Filed: October 26, 2004
    Publication date: April 12, 2007
    Inventors: Masaki Terazono, Takeshi Okamura, Katsushi Sakaue
  • Publication number: 20070069610
    Abstract: In order to provide a multi-layer electronic component in which the occurrence of delamination between the ceramic layer and the internal electrode is restricted and a method for manufacturing the same, the multi-layer electronic component of the present invention comprises a stack formed by stacking piezoelectric layers and internal electrodes one on another alternately and a pair of external electrodes formed on two opposing side faces of the stack, wherein the internal electrode consists of a first internal electrode connected to the external electrode formed on one of the two side faces and a second internal electrode located between the first internal electrode and connected to the external electrode formed on the other one of the two side faces, and wherein the internal electrodes and the piezoelectric layers are faced in proximity so that a space between them is 2 ?m or less over an area occupying 50% or more of the active region where the first internal electrode and the second internal electrode oppo
    Type: Application
    Filed: July 28, 2004
    Publication date: March 29, 2007
    Inventors: Susumu Ono, Takeshi Okamura, Katsushi Sakaue, Takaaki Hira, Masaki Terazono
  • Patent number: 6643115
    Abstract: Disclosed is an electrostatic chuck comprising a ceramic dielectric layer having a surface for placing thereon a work that is to be held, and an electrode provided on a surface opposite to the surface of the ceramic dielectric layer for placing the work thereon, wherein: the placing surface of the ceramic dielectric layer is sectionalized into an outer peripheral region and a central region by gas injection grooves extending in a circumferential manner; the surface roughness Ra(o) of the outer peripheral region of the placing surface and the surface roughness Ra(i) ot the central region satisfy the following conditions: 0.6≦Ra(i)≦1.5 &mgr;m Ra(o)≦0.7 &mgr;m Ra(i)≧Ra(o)  and the outer peripheral region of the placing surface is higher than the inner peripheral region by not less than 0.6 &mgr;m.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: November 4, 2003
    Assignee: Kyocera Corporation
    Inventors: Katsushi Sakaue, Shoji Kosaka, Ichio Kiyofuji, Junji Ohe, Masaki Terazono, Yasushi Migita, Naohito Higashi, Hitoshi Atari
  • Publication number: 20020176219
    Abstract: Disclosed is an electrostatic chuck comprising a ceramic dielectric layer having a surface for placing thereon a work that is to be held, and an eloctrode provided on a surface opposite to the surface of the ceramic dielectric layer for placing the work thereon, wherein:
    Type: Application
    Filed: February 27, 2002
    Publication date: November 28, 2002
    Inventors: Katsushi Sakaue, Shoji Kosaka, Ichio Kiyofuji, Junji Ohe, Masaki Terazono, Yasushi Migita, Naohito Higashi, Hitoshi Atari
  • Patent number: 5523267
    Abstract: A silicon nitride-silicon carbide composite sintered material which comprises 100 parts by weight of a silicon nitride component containing 92 to 99.5 mol % of silicon nitride including excessive oxygen and 0.5 to 8 mol % of the elements of Group IIIa in the Periodic Table as corresponding oxides thereof and 1 to 100 parts by weight of a silicon carbide component in a dispersed state, wherein the silicon nitride component has an average particle size of 1 .mu.m or less and an average aspect ratio of 2 to 10, and the silicon carbide component has an average particle size of 1 .mu.m or less, moreover, the total amount of Al, Mg, Ca respectively contained in the sintered material as calculated as oxides thereof is 0.5% by weight or less, and a manufacturing method thereof.According to the above-mentioned composite sintered material, it becomes possible to suppress deterioration of strength at 1400.degree. C. and realize excellent creep properties.
    Type: Grant
    Filed: July 18, 1994
    Date of Patent: June 4, 1996
    Assignee: Kyocera Corporation
    Inventors: Kouichi Tanaka, Masaki Terazono, Masahiro Satoh, Masahito Nakanishi, Hideki Uchimura, Shoji Kousaka
  • Patent number: 5114889
    Abstract: Disclosed is a silicon nitride sintered body comprising 70 to 99 mole % of silicon nitride, 0.1 to 5 moles % of a rare earth element oxide and up to 25 moles % of silicon oxide and having a silicon oxide-to-rare earth element oxide molar ratio of from 2 to 25, wherein silicon nitride crystal grains have a fine acicular structure having an average particle major axis of up to 7 .mu.m and an average aspect ratio of at least 3.
    Type: Grant
    Filed: November 27, 1990
    Date of Patent: May 19, 1992
    Assignee: Kyocera Corporation
    Inventors: Kazumi Osamura, Masaki Terazono, Shoji Kohsaka, Kazunori Koga, Akira Saito, Masahiro Sato, Hideki Uchimura