Abstract: In a digital amplifier, a time controller generates first and second selection signals for outputting any one of music data, a center output, and a lowest output to a P output and an N output based on a power ON/OFF signal and a start/stop signal, and also generates a third selection signal for determining whether a signal having the same phase as that of the P output is output to the N output or a signal obtained by inverting the P output is output to the N output. A data selection circuit determines data to be output to the P output and the N output based on the first and second selection signals. An output data register circuit converts parallel data determined by the data selection circuit into serial data to output the serial data into the P output. An output selection circuit determines the N output based on the third selection signal.

Abstract: In a digital amplifier, a time controller generates first and second selection signals for outputting any one of music data, a center output, and a lowest output to a P output and an N output based on a power ON/OFF signal and a start/stop signal, and also generates a third selection signal for determining whether a signal having the same phase as that of the P output is output to the N output or a signal obtained by inverting the P output is output to the N output. A data selection circuit determines data to be output to the P output and the N output based on the first and second selection signals. An output data register circuit converts parallel data determined by the data selection circuit into serial data to output the serial data into the P output. An output selection circuit determines the N output based on the third selection signal.

Abstract: A pulse width modulation (PWM) converting circuit includes a pulse generator for generating two pulse signals for each bit of a basic clock pulse train, in response to the value of digital input data, and a differential amplifier for outputting a differential amplification component between the two pulse signals as a PWM signal. The pulse generator varies pulse width of a first of the two pulse signals, on a bit-by-bit basis, of the basic clock pulse train, in response to the value of the digital input data, and holds a level of a second of the two pulse signals throughout all of the bits of the basic clock pulse train, within the period of the pulse of the PWM signal.

Abstract: A PWM converting circuit includes a pulse generator for generating two pulse signals for each bit of a basic clock pulse train in response to the value of digital input data, and a differential amplifier for outputting a differential amplification component between the two pulse signals as a PWM signal. The pulse generator varies a pulse width of one of the two pulse signals on a bit-by-bit basis of the basic clock pulse train in response to the value of the digital input data, and holds a level of the other of the two pulse signals throughout the entire bits of the basic clock pulse train within the period of the pulse of the PWM signal.

Abstract: In the sound signal adding apparatus in which there is a limitation on the number of reproducible sound sources, a remaining reproduction time determining section and a sound data attenuation controlling section are provided. The remaining reproduction time determining section checks, when sound data is to be added and reproduced, the remaining reproduction time of the sound data current being reproduced and detects a sound data having least reproduction time remaining. While the sound data attenuation controlling section reduces the output level of the sound signal corresponding to the sound data detected by the remaining reproduction time determining section.