Abstract: A signal processor sends clock and data signals from a microcomputer via two lines to two ICs of the same configuration. The ICs each have a built-in circuit for discriminating between the clock and data signals. This avoids the necessity of fabricating two kinds of ICs of different addresses, and hence obviates the need for forming extra masks in their manufacturing process, cutting their production costs.

Abstract: The present invention provides a data interpolating circuit for n-point data interpolating between two digital data signals. This data interpolating circuit comprises a first hold circuit Y0 for holding first data signal, a second hold circuit Yn (n is an interpolating number) for holding second data signal, and a plurality of (Y(n-1)) pairs of a computing circuit and a hold circuit, wherein the computing circuit computes a mid value y.sub.i (i: an integer; 0<i<n) of two input digital data signals, the hold circuit holds the computed mid value y.sub.i, and the data interpolating circuit is connected so that the mid value y.sub.i outputted to the i-th hold circuit Yi of these plurality of pairs is calculated as follows.y.sub.i =(y.sub.0 +y2.sub.i)/2: in case i.ltoreq.n/2y.sub.i =(y(2.sub.i-n)+y.sub.n)/2: in case i>n/2The present sixteen-times data interpolating circuit decreases errors during interpolation and gives accurate analog conversion.