Patents by Inventor Masako Fukumitsu
Masako Fukumitsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9202757Abstract: According to one embodiment, a semiconductor module includes: a first circuit component: a second circuit component; and a third circuit component. The first circuit component includes: an insulating first substrate; a first conductive layer; a first switching element; and a first diode. The second circuit component includes: an insulating second substrate; a second conductive layer; a second switching element; and a second diode. The second circuit component is disposed between the first circuit component and the third circuit component. The third circuit component includes: an insulating third substrate; a third conductive layer provided on the third substrate and including a third element mounting unit; a third switching element provided on the third element mounting unit; and a third diode provided on the third element mounting unit. A direction from the third switching element toward the third diode is an opposite direction to the first direction.Type: GrantFiled: September 16, 2013Date of Patent: December 1, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Tomohiro Iguchi, Masayuki Uchida, Daisuke Hiratsuka, Masako Fukumitsu
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Patent number: 8975732Abstract: According to one embodiment, a semiconductor device includes, a chip including a first chip electrode on a first surface on one side, and a second chip electrode on a second surface on the other side, an electrically conductive frame provided on a side periphery of the chip, a rewiring configured to electrically connect the second chip electrode and the electrically conductive frame on the other side of the chip, and an insulation side portion provided between the electrically conductive frame and the side periphery of the chip.Type: GrantFiled: March 13, 2013Date of Patent: March 10, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Akira Tojo, Kazuhito Higuchi, Tomohiro Iguchi, Masako Fukumitsu, Daisuke Hiratsuka, Akihiro Sasaki, Masayuki Uchida
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Publication number: 20140264435Abstract: According to one embodiment, a semiconductor module includes: a first circuit component: a second circuit component; and a third circuit component. The first circuit component includes: an insulating first substrate; a first conductive layer; a first switching element; and a first diode. The second circuit component includes: an insulating second substrate; a second conductive layer; a second switching element; and a second diode. The second circuit component is disposed between the first circuit component and the third circuit component. The third circuit component includes: an insulating third substrate; a third conductive layer provided on the third substrate and including a third element mounting unit; a third switching element provided on the third element mounting unit; and a third diode provided on the third element mounting unit. A direction from the third switching element toward the third diode is an opposite direction to the first direction.Type: ApplicationFiled: September 16, 2013Publication date: September 18, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tomohiro IGUCHI, Masayuki Uchida, Daisuke Hiratsuka, Masako Fukumitsu
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Publication number: 20130241040Abstract: According to one embodiment, a semiconductor device includes, a chip including a first chip electrode on a first surface on one side, and a second chip electrode on a second surface on the other side, an electrically conductive frame provided on a side periphery of the chip, a rewiring configured to electrically connect the second chip electrode and the electrically conductive frame on the other side of the chip, and an insulation side portion provided between the electrically conductive frame and the side periphery of the chip.Type: ApplicationFiled: March 13, 2013Publication date: September 19, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Akira Tojo, Kazuhito Higuchi, Tomohiro Iguchi, Masako Fukumitsu, Daisuke Hiratsuka, Akihiro Sasaki, Masayuki Uchida
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Patent number: 8378479Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating maType: GrantFiled: July 21, 2011Date of Patent: February 19, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Akira Tojo, Tomoyuki Kitani, Kazuhito Higuchi, Masako Fukumitsu, Tomohiro Iguchi, Hideo Nishiuchi, Kyoto Kato
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Patent number: 8193643Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a semiconductor element, a first electrode of the semiconductor chip being configured on a first surface of the semiconductor element, a second electrode of the semiconductor element being configured on a second surface opposed to the first surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, a first hole and a second hole being configured in the encapsulating material, a portion of the first electrode and a portion of the second electrode being exposed, a first conductive material being connected to the first surface of the semiconductor chip via the first hole, a second conductive material being connected to the second surface of the semiconductor chip via the second hole, and a plating film covering five surfaces of the first conductive material other than one surface contacting with the encapsulating material and five surfaces ofType: GrantFiled: August 25, 2009Date of Patent: June 5, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Akira Tojo, Tomoyuki Kitani, Tomohiro Iguchi, Takahiro Aizawa, Hideo Nishiuchi, Masako Fukumitsu
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Publication number: 20110272817Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating maType: ApplicationFiled: July 21, 2011Publication date: November 10, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Akira TOJO, Tomoyuki KITANI, Kazuhito HIGUCHI, Masako FUKUMITSU, Tomohiro IGUCHI, Hideo NISHIUCHI, Kyoko KATO
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Patent number: 8008773Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating maType: GrantFiled: September 3, 2009Date of Patent: August 30, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Akira Tojo, Tomoyuki Kitani, Kazuhito Higuchi, Masako Fukumitsu, Tomohiro Iguchi, Hideo Nishiuchi, Kyoko Kato
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Publication number: 20110186982Abstract: According to one embodiment, a surface mount diode including a diode chip including a first main surface and a second main surface, a cathode electrode including a first internal electrode portion on the first main surface and a first external electrode portion on the first internal electrode portion, an anode electrode including a second internal electrode portion on the second main surface and a second external electrode portion on the second internal electrode portion, a thickness of the second external electrode portion being the same as a thickness of the first external electrode portion, a first covering member covering a periphery surface of one of the internal electrode portions and a periphery surface of the diode chip, and a second covering member covering a periphery surface of the other of the internal electrode portions, the second covering member being different in color from the first covering member.Type: ApplicationFiled: January 28, 2011Publication date: August 4, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tomoyuki KITANI, Akira TOJO, Takao NOGI, Kazuhito HIGUCHI, Tomohiro IGUCHI, Masako FUKUMITSU, Susumu OBATA, Yusaku ASANO
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Publication number: 20100052185Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a semiconductor element, a first electrode of the semiconductor chip being configured on a first surface of the semiconductor element, a second electrode of the semiconductor element being configured on a second surface opposed to the first surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, a first hole and a second hole being configured in the encapsulating material, a portion of the first electrode and a portion of the second electrode being exposed, a first conductive material being connected to the first surface of the semiconductor chip via the first hole, a second conductive material being connected to the second surface of the semiconductor chip via the second hole, and a plating film covering five surfaces of the first conductive material other than one surface contacting with the encapsulating material and five surfaces ofType: ApplicationFiled: August 25, 2009Publication date: March 4, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Akira TOJO, Tomoyuki Kitani, Tomohiro Iguchi, Takahiro Aizawa, Hideo Nishiuchi, Masako Fukumitsu
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Publication number: 20100052142Abstract: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating maType: ApplicationFiled: September 3, 2009Publication date: March 4, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Akira Tojo, Tomoyuki Kitani, Kazuhito Higuchi, Masako Fukumitsu, Tomohiro Iguchi, Hideo Nishiuchi, Kyoko Kato
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Publication number: 20090209065Abstract: An example of the invention is a method of manufacturing a semiconductor device including, pressing a part of the connection conductor having a plate-like shape or a belt-like shape against a lead terminal which is formed on a lead frame, is formed into a thin and long plate-like shape, and is supported only at one end in a longitudinal direction of the terminal, in such a manner that the part of the conductor is brought into contact with the lead terminal, and applying ultrasonic vibration substantially in the longitudinal direction in a plane perpendicular to the pressing direction to the connection conductor in the state where the part of the connection conductor is pressed against the lead terminal.Type: ApplicationFiled: February 9, 2009Publication date: August 20, 2009Inventors: Hideo NISHIUCHI, Tomohiro Iguchi, Tomoyuki Kitani, Takahiro Aizawa, Masako Fukumitsu, Akira Tojo