Patents by Inventor Masako Watanabe

Masako Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8598029
    Abstract: A semiconductor device, which comprises a workpiece with an outline and a plurality of contact pads and further an external part with a plurality of terminal pads. This part is spaced from the workpiece and the terminal pads are aligned with the workpiece contact pads, respectively. A reflow element interconnects each of the contact pads with its respective terminal pad. Thermoplastic material fills the space between the workpiece and the part; this material adheres to the workpiece, the part and the reflow elements. Further, the material has an outline substantially in line with the outline of the workpiece, and fills the space substantially without voids. Due to the thermoplastic character of the filling material, the finished device can be reworked, when the temperature range for reflowing the reflow elements is reached.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: December 3, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Masako Watanabe, Masazumi Amagai
  • Publication number: 20120220080
    Abstract: A semiconductor device, which comprises a workpiece with an outline and a plurality of contact pads and further an external part with a plurality of terminal pads. This part is spaced from the workpiece and the terminal pads are aligned with the workpiece contact pads, respectively. A reflow element interconnects each of the contact pads with its respective terminal pad. Thermoplastic material fills the space between the workpiece and the part; this material adheres to the workpiece, the part and the reflow elements. Further, the material has an outline substantially in line with the outline of the workpiece, and fills the space substantially without voids. Due to the thermoplastic character of the filling material, the finished device can be reworked, when the temperature range for reflowing the reflow elements is reached.
    Type: Application
    Filed: May 8, 2012
    Publication date: August 30, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Masako Watanabe, Masazumi Amagai
  • Patent number: 8193085
    Abstract: A semiconductor device (1700), which comprises a workpiece (1201) with an outline (1711) and a plurality of contact pads (1205) and further an external part (1701) with a plurality of terminal pads (1702). This part is spaced from the workpiece, and the terminal pads are aligned with the workpiece contact pads, respectively. A reflow element (1203) interconnects each of the contact pads with its respective terminal pad. Thermoplastic material (1204) fills the space between the workpiece and the part; this material adheres to the workpiece, the part and the reflow elements. Further, the material has an outline (1711) substantially in line with the outline of the workpiece, and fills the space (1707) substantially without voids. Due to the thermoplastic character of the filling material, the finished device can be reworked, when the temperature range for reflowing the reflow elements is reached.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: June 5, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Masako Watanabe, Masazumi Amagai
  • Publication number: 20100144098
    Abstract: A semiconductor device (1700), which comprises a workpiece (1201) with an outline (1711) and a plurality of contact pads (1205) and further an external part (1701) with a plurality of terminal pads (1702). This part is spaced from the workpiece, and the terminal pads are aligned with the workpiece contact pads, respectively. A reflow element (1203) interconnects each of the contact pads with its respective terminal pad. Thermoplastic material (1204) fills the space between the workpiece and the part; this material adheres to the workpiece, the part and the reflow elements. Further, the material has an outline (1711) substantially in line with the outline of the workpiece, and fills the space (1707) substantially without voids. Due to the thermoplastic character of the filling material, the finished device can be reworked, when the temperature range for reflowing the reflow elements is reached.
    Type: Application
    Filed: February 10, 2010
    Publication date: June 10, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Masako WATANABE, Masazumi AMAGAI
  • Patent number: 7701071
    Abstract: A semiconductor device (1700), which comprises a workpiece (1201) with an outline (1711) and a plurality of contact pads (1205) and further an external part (1701) with a plurality of terminal pads (1702). This part is spaced from the workpiece, and the terminal pads are aligned with the workpiece contact pads, respectively. A reflow element (1203) interconnects each of the contact pads with its respective terminal pad. Thermoplastic material (1204) fills the space between the workpiece and the part; this material adheres to the workpiece, the part and the reflow elements. Further, the material has an outline (1711) substantially in line with the outline of the workpiece, and fills the space (1707) substantially without voids. Due to the thermoplastic character of the filling material, the finished device can be reworked, when the temperature range for reflowing the reflow elements is reached.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: April 20, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Masako Watanabe, Masazumi Amagai
  • Publication number: 20100090323
    Abstract: The present invention provides a spacer sheet for a complex type semiconductor device provided between the semiconductor packages of a complex type semiconductor device formed by laminating plural semiconductor packages, comprising through holes of an array corresponding to electrodes which can be provided onto a substrate of one semiconductor package and which are formed in order to connect and wire one semiconductor package with the other semiconductor package and a space part corresponding to a principal part of the above one semiconductor package mounted on the substrate or a principal part of the other semiconductor package opposed to the substrate and a production process for a complex type semiconductor device in which the above spacer sheet is used.
    Type: Application
    Filed: October 22, 2007
    Publication date: April 15, 2010
    Applicant: Lintec Corporation
    Inventors: Tomonori Shinoda, Hironori Shizuhata, Hirofumi Shinoda, Yuji Kawamata, Takeshi Tashima, Masato Shimamura, Masako Watanabe, Masazumi Amagai
  • Publication number: 20100025837
    Abstract: The present invention relates to a complex type semiconductor device formed by laminating plural semiconductor packages, wherein it comprises: an upper semiconductor package which comprises a substrate for wiring and connecting provided with electrodes for conducting packages on a lower surface in the upper semiconductor package and a principal part of the upper semiconductor package disposed on an upper surface and/or a lower surface of the above substrate and which constitutes a relatively upper part, a lower semiconductor package which comprises a substrate for wiring and connecting provided with electrodes for conducting packages on an upper surface in the lower semiconductor package and a principal part of the lower semiconductor package disposed on an upper surface and/or a lower surface of the above substrate and which constitutes a relatively lower part, a spacer sheet which comprises a space part corresponding to the principal part of the upper semiconductor package and/or the principal part of th
    Type: Application
    Filed: October 22, 2007
    Publication date: February 4, 2010
    Applicant: LINTEC CORPORATION
    Inventors: Tomonori Shinoda, Hironori Shizuhata, Hirofumi Shinoda, Yuji Kawamata, Takeshi Tashima, Masato Shimamura, Masako Watanabe, Masazumi Amagai
  • Patent number: 7646193
    Abstract: A device inspection apparatus that is capable of judging the functions of operating control buttons on a cellular phone or like device automatically and easily. The device inspection apparatus comprises an adapter unit 2 on which a cellular phone 1 is mounted; a camera 4 for picking up the image of an LCD panel 3, which serves as a display section for the cellular phone 1; a plunger unit 7, which has a plurality of releases 6 for pressing a key button 5 on the cellular phone 1; a computer 8 for controlling the operation of the plunger unit 7 and exercising control; and a monitor 9 for displaying an LCD panel image and an image based on a signal from the computer 8. A still picture, motion picture, or audio output, which is acquired when a release 6 presses a key button 5, is compared against a predetermined expected image or sound to judge the functionality of the cellular phone 1.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: January 12, 2010
    Assignee: Japan Novel Corporation
    Inventors: Yoshio Suzuki, Masako Watanabe
  • Publication number: 20080157353
    Abstract: A microelectronic device package interconnect for electrically connecting a plurality of substrates is provided. The microelectronic device package interconnect comprises an insulative layer positioned on a substrate, wherein the insulative layer has an opening extending through the insulative layer to the substrate. The microelectronic device package interconnect further comprises solder positioned in the opening.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Masako Watanabe, Masazumi Amagai
  • Publication number: 20070243098
    Abstract: [Problem]Mobile electronic equipment is often dropped during use or transport, and the soldered joints of electronic parts sometimes peel off due to the impact when dropped. In addition, they undergo heat cycles in which internal coils, resistors, and the like generate heat and soldered joints increase in temperature during operation of electronic equipment and cool off during periods of non-use. With a conventional Sn—Ag base lead-free solder, the impact resistance and resistance to heat cycles of minute portions such as solder bumps were not adequate. The present invention provides a lead-free solder alloy, bumps of which have excellent impact resistance and resistance to heat cycles. Means for Solving the Problem The present invention is a lead-free solder alloy comprising 0.1—less than 2.0 mass % of Ag, 0.01-0.1 mass % of Cu, 0.005-0.1 mass % of Zn, and a remainder of Sn, to which Ga, Ge, or P may be added, and to which Ni or Co may be further added.
    Type: Application
    Filed: July 29, 2004
    Publication date: October 18, 2007
    Inventors: Tsukasa Ohnishi, Tokuro Yamaki, Masazumi Amagai, Masako Watanabe
  • Patent number: 7282175
    Abstract: A lead-free solder includes 0.05-5 mass % of Ag, 0.01-0.5 mass % of Cu, at least one of P, Ge, Ga, Al, and Si in a total amount of 0.001-0.05 mass %, and a remainder of Sn. One or more of a transition element for improving resistance to heat cycles, a melting point lowering element such as Bi, In, or Zn, and an element for improving impact resistance such as Sb may be added.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: October 16, 2007
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Masazumi Amagai, Masako Watanabe, Kensho Murata, Yoshitaka Toyoda, Minoru Ueshima, Tsukasa Ohnishi, Takeshi Tashima, Daisuke Souma, Takahiro Roppongi, Hiroshi Okada
  • Publication number: 20070205751
    Abstract: [Object] To provide a device inspection apparatus that is capable of judging the functions of operating control buttons on a cellular phone or like device automatically and easily. [Solution] The device inspection apparatus comprises an adapter unit 2 on which a cellular phone 1 is mounted; a camera 4 for picking up the image of an LCD panel 3, which serves as a display section for the cellular phone 1; a plunger unit 7, which has a plurality of releases 6 for pressing a key button 5 on the cellular phone 1; a computer 8 for controlling the operation of the plunger unit 7 and exercising control, for instance, for judging the contents of the LCD panel 3; and a monitor 9 for displaying an LCD panel image and an image based on a signal from the computer 8. A still picture, motion picture, or audio output, which is acquired when a release 6 presses a key button 5, is compared against a predetermined expected image or sound to judge the functionality of the cellular phone 1.
    Type: Application
    Filed: January 24, 2005
    Publication date: September 6, 2007
    Applicant: JAPAN NOVEL CORPORATION
    Inventors: Yoshio Suzuki, Masako Watanabe
  • Publication number: 20070170599
    Abstract: A tape for use as a carrier in semiconductor assembly, which has one or more base sheets 101 of polymeric, preferably thermoplastic, material having first (101a) and second (101b) surfaces. A polymeric adhesive film (102, 104) and a foil (103, 105) of different, preferably inert, material are attached to the base sheet on both the first and second surface sides; they thus provide a thickness (120) to the tape. A plurality of holes is formed through the thickness of the tape; the holes are preferably tapered with an angle between about 70° and 80° with the second tape surface. A reflow metal element (301), with a preferred diameter (302) about equal to the tape thickness, is held in each of the holes.
    Type: Application
    Filed: January 24, 2006
    Publication date: July 26, 2007
    Inventors: Masazumi Amagai, Masako Watanabe
  • Publication number: 20060214314
    Abstract: A semiconductor device (1700), which comprises a workpiece (1201) with an outline (1711) and a plurality of contact pads (1205) and further an external part (1701) with a plurality of terminal pads (1702). This part is spaced from the workpiece, and the terminal pads are aligned with the workpiece contact pads, respectively. A reflow element (1203) interconnects each of the contact pads with its respective terminal pad. Thermoplastic material (1204) fills the space between the workpiece and the part; this material adheres to the workpiece, the part and the reflow elements. Further, the material has an outline (1711) substantially in line with the outline of the workpiece, and fills the space (1707) substantially without voids. Due to the thermoplastic character of the filling material, the finished device can be reworked, when the temperature range for reflowing the reflow elements is reached.
    Type: Application
    Filed: March 24, 2005
    Publication date: September 28, 2006
    Inventors: Masako Watanabe, Masazumi Amagai
  • Patent number: 7029542
    Abstract: A lead-free solder alloy comprises 1.0–5.0 wt % Ag, 0.01–0.5 wt % Ni, one or both of (a) 0.001–0.05 wt % Co and (b) at least one of P, Ge, and Ga in a total amount of 0.001–0.05 wt %, and a remainder of Sn. The solder can form solder bumps which have a high bonding strength and which do not undergo yellowing after soldering.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: April 18, 2006
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Masazumi Amagai, Masako Watanabe, Kensho Murata, Osamu Munekata, Yoshitaka Toyoda, Minoru Ueshima, Tsukasa Ohnishi, Hiroshi Okada
  • Patent number: 6887778
    Abstract: A semiconductor device and its manufacturing method with which the connection reliability can be improved without complicating the manufacturing process. Semiconductor chip 102 is mounted on the principal surface of insulated substrate 104, and a conductive paste containing a heat-curing epoxy resin is supplied to via holes 116 from the back of insulated substrate 104. Then, solder balls 118 are transferred onto the conductive paste of insulated substrate 104, and reflow soldering is applied in order to bond solder balls 118 to insulated substrate 104. During the reflow soldering, the heat-curing epoxy resin forms resin parts 120 around solder balls 118.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: May 3, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Masako Watanabe, Mutsumi Masumoto
  • Publication number: 20050036902
    Abstract: A lead-free solder alloy comprises 1.0-5.0 wt % Ag, 0.01-0.5 wt % Ni, one or both of (a) 0.001-0.05 wt % Co and (b) at least one of P, Ge, and Ga in a total amount of 0.001-0.05 wt %, and a remainder of Sn. The solder can form solder bumps which have a high bonding strength and which do not undergo yellowing after soldering.
    Type: Application
    Filed: July 8, 2003
    Publication date: February 17, 2005
    Inventors: Masazumi Amagai, Masako Watanabe, Osamu Munekata, Yoshitaka Toyoda, Minoru Ueshima, Tsukasa Ohnishi, Hiroshi Okada
  • Publication number: 20040262779
    Abstract: A lead-free solder includes 0.05-5 mass % of Ag, 0.01-0.5 mass % of Cu, at least one of P, Ge, Ga, Al, and Si in a total amount of 0.001-0.05 mass %, and a remainder of Sn. One or more of a transition element for improving resistance to heat cycles, a melting point lowering element such as Bi, In, or Zn, and an element for improving impact resistance such as Sb may be added.
    Type: Application
    Filed: April 15, 2004
    Publication date: December 30, 2004
    Inventors: Masazumi Amagai, Masako Watanabe, Kensho Murata, Yoshitaka Toyoda, Minoru Ueshima, Tsukasa Ohnishi, Takeshi Tashima, Daisuke Souma, Takahiro Roppongi, Hiroshi Okada
  • Patent number: 6762506
    Abstract: Apparatus and method for assembling a semiconductor device on a wiring substrate is disclosed, wherein Pb (lead) is not used and the chance of generation of defects is reduced. Semiconductor package (100) has solder balls (114) containing Sn (tin), Ag (silver) and Cu (copper). Wiring substrate 200 has connecting terminals 208 for connecting solder balls (114). The connecting terminals (208) have an Au (gold) layer (212) and a Ni layer (210). In the operation for assembling semiconductor package (100) onto wiring substrate (200), because solder balls (114) are heated and fixed on connecting terminals (208), Au in Au layer (212) diffuses into balls (114). Because Au is contained in solder balls (114), a high bonding strength is obtained, and the chance of generation of defects is reduced.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: July 13, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Masazumi Amagai, Masako Watanabe
  • Publication number: 20030173587
    Abstract: Apparatus and method for assembling a semiconductor device on a wiring substrate is disclosed, wherein Pb (lead) is not used and the chance of generation of defects is reduced. Semiconductor package (100) has solder balls (114) containing Sn (tin), Ag (silver) and Cu (copper). Wiring substrate 200 has connecting terminals 208 for connecting solder balls (114). The connecting terminals (208) have an Au (gold) layer (212) and a Ni layer (210). In the operation for assembling semiconductor package (100) onto wiring substrate (200), because solder balls (114) are heated and fixed on connecting terminals (208), Au in Au layer (212) diffuses into balls (114). Because Au is contained in solder balls (114), a high bonding strength is obtained, and the chance of generation of defects is reduced.
    Type: Application
    Filed: January 7, 2003
    Publication date: September 18, 2003
    Inventors: Masazumi Amagai, Masako Watanabe