Patents by Inventor Masakuni Tokita
Masakuni Tokita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6966742Abstract: A work arrangement apparatus arranges plate-shaped works in such a manner that the works are piled up being interposed between interlayer sheets. The apparatus comprises: a work conveyance belt for intermittently transporting the works, one by one; a first air-suction unit for sucking with air the works to the work conveyance belt; an interlayer sheet conveyance belt for intermittently transporting the sheets, one by one, the interlayer sheet conveyance belt being arranged to cross with the work conveyance belt; a second air-suction unit for sucking with air the sheets to the interlayer sheet conveyance belt.Type: GrantFiled: September 25, 2003Date of Patent: November 22, 2005Assignee: Shinko Electric Industries Co., Ltd.Inventors: Masakuni Tokita, Masatoshi Katayama
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Publication number: 20040105749Abstract: A work arrangement apparatus arranges plate-shaped works in such a manner that the works are piled up being interposed between interlayer sheets. The apparatus comprises: a work conveyance belt for intermittently transporting the works, one by one; a first air-suction unit for sucking with air the works to the work conveyance belt; an interlayer sheet conveyance belt for intermittently transporting the sheets, one by one, the interlayer sheet conveyance belt being arranged to cross with the work conveyance belt; a second air-suction unit for sucking with air the sheets to the interlayer sheet conveyance belt.Type: ApplicationFiled: September 25, 2003Publication date: June 3, 2004Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Masakuni Tokita, Masatoshi Katayama
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Patent number: 6271483Abstract: A wiring board has vias which penetrate the wiring board from one side to the other side. The vias are radially arranged in the direction from one side to the other side so that the interval between the vias on one side can be made smaller than the interval between the vias on the other side. In order to prevent the vias from being electrically short-circuited to each other, even if the interval between the vias provided on one side of the wiring board is extremely reduced, a plurality of vias are radially arranged in the direction from one side of the wiring board to the other side so that an interval between the vias on one side of the wiring board can be made smaller than interval of the vias on the other side. A conductor forming the core portion of the via is coated with a sheath portion made of insulating material.Type: GrantFiled: December 15, 1998Date of Patent: August 7, 2001Assignee: Shinko Electric Industries Co., LTDInventors: Michio Horiuchi, Toshiaki Suyama, Masakuni Tokita
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Patent number: 5918746Abstract: A one side resin sealing type semiconductor device has a semiconductor element which is mounted on one side of a circuit board. Wiring patterns are provided on both sides of the circuit board. The semiconductor element mount portion is sealed with resin. External connecting terminals, such as soldering balls, are joined to the wiring pattern on the-other side of the circuit board. The method of manufacturing one side resin sealing type semiconductor devices includes the steps of: positioning and disposing the circuit board formed into an individual piece corresponding to a through-hole formed in a rectangular carrier frame; and conveying the circuit board supported by the carrier frame so as to conduct a series of processing steps such as mounting the semiconductor element, electrically connecting the semiconductor element with the wiring pattern, sealing the semiconductor element mount portion with resin, and connecting the wiring pattern with the external connecting terminals.Type: GrantFiled: October 29, 1997Date of Patent: July 6, 1999Assignee: Shinko Electric Industries Co., Ltd.Inventors: Masakuni Tokita, Mitsutoshi Higashi
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Patent number: 5732465Abstract: A one side resin sealing type semiconductor device has a semiconductor element which is mounted on one side of a circuit board. Wiring patterns are provided on both sides of the circuit board. The semiconductor element mount portion is sealed with resin. External connecting terminals, such as soldering balls, are joined to the wiring pattern on the other side of the circuit board. The method of manufacturing one side resin sealing type semiconductor devices includes the steps of: positioning and disposing the circuit board formed into an individual piece corresponding to a through-hole formed in a rectangular carrier frame; and conveying the circuit board supported by the carrier frame so as to conduct a series of processing steps such as mounting the semiconductor element, electrically connecting the semiconductor element with the wiring pattern, sealing the semiconductor element mount portion with resin, and connecting the wiring pattern with the external connecting terminals.Type: GrantFiled: July 14, 1995Date of Patent: March 31, 1998Assignee: Shinko Electric Industries Co., Ltd.Inventors: Masakuni Tokita, Mitsutoshi Higashi
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Patent number: 5231756Abstract: A process for manufacturing a multi-layer lead frame for a semiconductor device comprises two metal plains being adhered to each other via an insulation piece. An insulation strip is punched to cut the insulation piece, which is preliminary adhered to a metal strip. The metal strip is then punched to cut and remove the metal plane, which is then laminated and heat-pressed to another metal strip. After completely adhered, the other metal strip is punched to remove a multi-layer lead frame.Type: GrantFiled: October 13, 1992Date of Patent: August 3, 1993Assignees: Shinko Electric Industries Co., Ltd., Intel Corp.Inventors: Masakuni Tokita, Akira Kobayashi, Shinichi Yamakawa, Mitsuharu Shimizu, Norihiro Masuda
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Patent number: RE35353Abstract: A process for manufacturing a multi-layer lead frame for a semiconductor device comprises two metal plains being adhered to each other via an insulation piece. An insulation strip is punched to cut the insulation piece, which is preliminary adhered to a metal strip. The metal strip is then punched to cut and remove the metal plane, which is then laminated and heat-pressed to another metal strip. After completely adhered, the other metal strip is punched to remove a multi-layer lead frame.Type: GrantFiled: September 28, 1994Date of Patent: October 22, 1996Assignees: Shinko Electric Ind. Co, Ltd., Intel CorporationInventors: Masakuni Tokita, Akira Kobayashi, Shinichi Yamakawa, Mitsuharu Shimizu, Norihiro Masuda