Patents by Inventor Masakzau Ishino

Masakzau Ishino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7531905
    Abstract: A stacked semiconductor device includes an interposer substrate having external power supply terminals, and semiconductor chips stacked on the interposer substrate. A power supply wiring arranged in the semiconductor chip located in the bottom layer is connected to the external power supply terminal via a bump electrode, the power supply wiring arranged in the semiconductor chip located in the top layer is connected to the external power supply terminal via a bonding wire, and the power supply wirings each arranged in adjacent semiconductor chips are mutually connected via the through electrode. Such a loop structure can solve a problem such that the higher the semiconductor chip, the larger its voltage drop.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: May 12, 2009
    Assignee: Elpida Memory, Inc.
    Inventors: Masakzau Ishino, Hiroaki Ikeda, Junji Yamada