Patents by Inventor Masami Ohnishi

Masami Ohnishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106553
    Abstract: The position of a movable body is estimated without requiring the movable body to recognize and report its own position, and the position is reflected in a structural model constructed in a computer for the purpose of wireless communication environment evaluation.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 28, 2024
    Inventors: Ken TAKEI, Yuichi IGARASHI, Masami OHNISHI
  • Publication number: 20230396348
    Abstract: An objective of the present invention is to use a calculation model to calculate, with good accuracy, behavior of electromagnetic waves within an actual service area. Provided is a radio environment evaluation method that includes constructing, within a computer resource, a structural model for an electromagnetic wave scatterer, and when calculating a characteristic of an electromagnetic field by using the structural model and a ray that simulates a radio wave traveling straight through real space, correcting, in accordance with electromagnetic wave vector measurement data for real space, a state of a polygon included in the structural model.
    Type: Application
    Filed: May 24, 2023
    Publication date: December 7, 2023
    Inventors: Ken TAKEI, Masami OHNISHI, Ryosuke FUJIWARA
  • Patent number: 9407166
    Abstract: An inverter device includes; a switching element; a plurality of flyback diodes each connected in parallel with the switching element; a first conductor plate connected to anode terminals of the flyback diodes and to one side of the switching element; and a second conductor plate connected to cathode terminals of the flyback diodes and to the other side of the switching element. Each of the flyback diodes is formed in a polygonal shape, and the two flyback diodes in each pair of the flyback diodes that are arranged in mutually adjacent positions are arranged so that a vertex of one opposes a vertex of the other.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: August 2, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Masami Ohnishi, Takeshi Tokuyama
  • Patent number: 9106184
    Abstract: There are provided a high-frequency amplifier and a high-frequency module having a high efficiency for an extensive input modulated signal power, and base station/mobile wireless machines using the amplifier or the module. The high-frequency amplifier includes a circuit that detects an envelope of an input modulated signal; a control signal generator circuit (a voltage controlled circuit or a current controlled circuit) that can change a voltage or a current according to a given function on the basis of a magnitude of the detected envelope signal; and a diode clamped variable power circuit that connects a plurality of diode clamped circuits each including a diode, a transistor, and a DC power supply to one another.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: August 11, 2015
    Assignee: Hitachi, Ltd.
    Inventor: Masami Ohnishi
  • Publication number: 20140286067
    Abstract: An inverter device includes; a switching element; a plurality of flyback diodes each connected in parallel with the switching element; a first conductor plate connected to anode terminals of the flyback diodes and to one side of the switching element; and a second conductor plate connected to cathode terminals of the flyback diodes and to the other side of the switching element. Each of the flyback diodes is formed in a polygonal shape, and the two flyback diodes in each pair of the flyback diodes that are arranged in mutually adjacent positions are arranged so that a vertex of one opposes a vertex of the other.
    Type: Application
    Filed: March 5, 2014
    Publication date: September 25, 2014
    Applicant: Hitachi, Ltd.
    Inventors: Masami OHNISHI, Takeshi TOKUYAMA
  • Patent number: 8600321
    Abstract: The envelope tracking power supply includes a plurality of variable voltage supplies. A power supply controller of a power amplifier controls the plurality of variable voltage supplies so as to precisely divide the power supply voltage in a high frequency area, based on the voltage distribution of a received transmitted base band signal, in order to maximize the power added efficiency of the power amplifier. The power supply controller includes a threshold memory including a plurality of first zones, and a frequency memory including a plurality of second zones. The power supply controller changes the threshold held in the first zones so that each second zone approaches the average of the second zones.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: December 3, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Hiroi Nambu, Masami Ohnishi
  • Publication number: 20130229235
    Abstract: There are provided a high-frequency amplifier and a high-frequency module having a high efficiency for an extensive input modulated signal power, and base station/mobile wireless machines using the amplifier or the module. The high-frequency amplifier includes a circuit that detects an envelope of an input modulated signal; a control signal generator circuit (a voltage controlled circuit or a current controlled circuit) that can change a voltage or a current according to a given function on the basis of a magnitude of the detected envelope signal; and a diode clamped variable power circuit that connects a plurality of diode clamped circuits each including a diode, a transistor, and a DC power supply to one another.
    Type: Application
    Filed: August 31, 2011
    Publication date: September 5, 2013
    Inventor: Masami Ohnishi
  • Publication number: 20120309333
    Abstract: The envelope tracking power supply includes a plurality of variable voltage supplies. A power supply controller of a power amplifier controls the plurality of variable voltage supplies so as to precisely divide the power supply voltage in a high frequency area, based on the voltage distribution of a received transmitted base band signal, in order to maximize the power added efficiency of the power amplifier. The power supply controller includes a threshold memory including a plurality of first zones, and a frequency memory including a plurality of second zones. The power supply controller changes the threshold held in the first zones so that each second zone approaches the average of the second zones.
    Type: Application
    Filed: May 22, 2012
    Publication date: December 6, 2012
    Applicant: HITACHI, LTD.
    Inventors: Hiroi Nambu, Masami Ohnishi
  • Patent number: 7928802
    Abstract: An RF amplification device has amplification elements which amplify a radio frequency input signal in wireless radio communication. Transmission line transformers are coupled to one of an input electrode and an output electrode of the amplification elements and have a main line Lout arranged between the input and the output, and a sub line Lin1 arranged between an AC ground point and one of the input and the output and coupled to the main line Lout. By applying an operating voltage different from the ground voltage level to the AC ground point, the operating voltage is supplied to the output electrodes of the amplification elements via the sub line from the AC ground point. In realizing a high-performance load circuit in an RF amplification device, it is possible to avoid increase of a module height of an RF module.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: April 19, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Masami Ohnishi, Satoshi Tanaka, Ryouichi Tanaka
  • Publication number: 20100301947
    Abstract: The RF power amplifier includes first and second amplifiers Q1 and Q2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q1 and Q2 are formed on one semiconductor chip. The first bias voltage Vg1 of the amplifier Q1 is set to be higher than the second bias voltage Vg2 of the amplifier Q2 so that the amplifier Q1 is operational between Class B and AB, and Q2 is operational in Class C. The first effective device size Wgq1 of the amplifier Q1 is intentionally set to be smaller than the second effective device size Wgq2 of the amplifier Q2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.
    Type: Application
    Filed: June 14, 2010
    Publication date: December 2, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Toru Fujioka, Toshihiko Shimizu, Masami Ohnishi, Hidetoshi Matsumoto, Satoshi Tanaka
  • Patent number: 7825731
    Abstract: An RF amplifying device includes a transmission line transformer coupled to an output electrode of a power transistor for generating transmission power to be fed to an antenna. The transmission power from the output electrode of the power transistor is fed to one end of a main line of the transmission line transformer, and one end of a secondary line of the transmission line transformer is coupled to an AC grounding node. The other end of the secondary line is coupled to the one end of the main line, thereby generating the transmission power. Coupling energy is transmitted from the secondary line to the main line. Coupling members electrically coupled to the output electrode of the power transistor are electrically coupled to a joint formed in either the main line, or the secondary line, at part of the energy coupling part.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: November 2, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Masami Ohnishi, Ryouichi Tanaka
  • Patent number: 7756494
    Abstract: The RF power amplifier includes first and second amplifiers Q1 and Q2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q1 and Q2 are formed on one semiconductor chip. The first bias voltage Vg1 of the amplifier Q1 is set to be higher than the second bias voltage Vg2 of the amplifier Q2 so that the amplifier Q1 is operational between Class B and AB, and Q2 is operational in Class C. The first effective device size Wgq1 of the amplifier Q1 is intentionally set to be smaller than the second effective device size Wgq2 of the amplifier Q2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: July 13, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Toru Fujioka, Toshihiko Shimizu, Masami Ohnishi, Hidetoshi Matsumoto, Satoshi Tanaka
  • Publication number: 20100090767
    Abstract: An RF amplification device has amplification elements which amplify a radio frequency input signal in wireless radio communication. Transmission line transformers are coupled to one of an input electrode and an output electrode of the amplification elements and have a main line Lout arranged between the input and the output, and a sub line Lin1 arranged between an AC ground point and one of the input and the output and coupled to the main line Lout. By applying an operating voltage different from the ground voltage level to the AC ground point, the operating voltage is supplied to the output electrodes of the amplification elements via the sub line from the AC ground point. In realizing a high-performance load circuit in an RF amplification device, it is possible to avoid increase of a module height of an RF module.
    Type: Application
    Filed: December 19, 2007
    Publication date: April 15, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Masami Ohnishi, Satoshi Tanaka, Ryouichi Tanaka
  • Patent number: 7589588
    Abstract: A high-frequency power amplifier comprising: a plurality of power amplifiers arranged in parallel; an inductance element inserted in series in an input signal line of said each power amplifier; an input matching circuit for performing matching of inputs of a parallel connection which connected each series connection of said power amplifier and said inductance element in parallel; an output matching circuit for performing matching of outputs of the parallel connection; and a control unit for controlling said power amplifiers in such a manner that one of said power amplifiers is always brought to an operation condition and the remainder of said power amplifiers are brought to an operation or non-operation condition.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: September 15, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Masami Ohnishi, Tomonori Tanoue, Hidetoshi Matsumoto
  • Publication number: 20090085666
    Abstract: When an output electrode of a power transistor in the final amplifying stage is coupled to a transmission line transformer TLT serving as an impedance matching circuit, a condition for impedance matching of the transmission line transformer is maintained. An RF amplifying device comprises a transmission line transformer coupled to an output electrode of a power transistor for generating transmission power to be fed to an antenna. The transmission power from the output electrode of the power transistor is fed to one end of a main line of the transmission line transformer, and one end of a secondary line of the transmission line transformer is coupled to an AC grounding node. The other end of the secondary line is coupled to the one end of the main line, thereby generating the transmission power to be fed to the antenna from the other end of the main line.
    Type: Application
    Filed: August 15, 2008
    Publication date: April 2, 2009
    Inventors: MASAMI OHNISHI, Ryouichi Tanaka
  • Patent number: 7482875
    Abstract: The invention provides a wide-band, low-noise, and small-sized high frequency power amplifier that has small temperature dependence of the gain and is excellent in input matching. A parallel circuit consisting of a resistor whose resistance depends strongly on temperature and a conventional resistor is inserted serially into a signal path in an input matching circuit of an amplification unit, and resistances of the resistors are set to appropriate values, for example, about 2/3 times an input impedance of the amplification unit.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: January 27, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Tomonori Tanoue, Masami Ohnishi
  • Patent number: 7408405
    Abstract: For use in an amplifier configuration including a high-power amplifier and a low-power amplifier which are always interconnected in terms of high frequencies and between which switching is made using no switches, a highly stable high-frequency power amplifier module with high isolation between the amplifiers is provided. To reduce wrapping around from a low-power amplifier section in an activated state to a high-power amplifier section in a deactivated state or from the high-power amplifier section in an activated state to the low-power amplifier section in a deactivated state, an input matching circuit having high isolation characteristics is included in an input matching circuit portion which does not have much to do with amplifier efficiency. Switching of each of the amplifier sections between an activated state and a deactivated state is effected by control using bias input terminals.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: August 5, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Masami Ohnishi, Tomonori Tanoue, Hidetoshi Matsumoto
  • Patent number: 7368996
    Abstract: Disclosed is a power amplifier having highly stable and excellent controllability, and having low noise in comparison with conventional power amplifiers. With the power amplifier, a differential amplifier made up of transistors Q1, Q2 is provided in the initial stage thereof, and baluns doubling as inter-stage matching circuits, comprised of Cp1, Cp2, Lp1, and Ct1, Ct2, Lt1, respectively, are provided between the initial stage, and a second stage while an unbalanced single-ended circuit is provided in the second stage. The differential amplifier has an emitter-coupled type configuration for coupling both emitters with each other, and output control of the amplifier in the initial stage is executed by varying current of a current source coupled to both the emitters.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: May 6, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Tomonori Tanoue, Masami Ohnishi, Hidetoshi Matsumoto, Akira Kuriyama
  • Publication number: 20070298736
    Abstract: The RF power amplifier includes first and second amplifiers Q1 and Q2 as final-stage amplification power devices connected in parallel between an input terminal RF_In and an output terminal RF_Out. The amplifiers Q1 and Q2 are formed on one semiconductor chip. The first bias voltage Vg1 of the amplifier Q1 is set to be higher than the second bias voltage Vg2 of the amplifier Q2 so that the amplifier Q1 is operational between Class B and AB, and Q2 is operational in Class C. The first effective device size Wgq1 of the amplifier Q1 is intentionally set to be smaller than the second effective device size Wgq2 of the amplifier Q2 beyond a range of a manufacturing error of the semiconductor chip. An RF power amplifier that exhibits a high power-added efficiency characteristic regardless of whether the output power is High or Low can be materialized.
    Type: Application
    Filed: June 18, 2007
    Publication date: December 27, 2007
    Inventors: Toru FUJIOKA, Toshihiko Shimizu, Masami Ohnishi, Hidetoshi Matsumoto, Satoshi Tanaka
  • Publication number: 20070176687
    Abstract: Disclosed is a power amplifier having highly stable and excellent controllability, and having low noise in comparison with conventional power amplifiers. With the power amplifier, a differential amplifier made up of transistors Q1, Q2 is provided in the initial stage thereof, and baluns doubling as inter-stage matching circuits, comprised of Cp1, Cp2, Lp1, and Ct1, Ct2, Lt1, respectively, are provided between the initial stage, and a second stage while an unbalanced single-ended circuit is provided in the second stage. The differential amplifier has an emitter-coupled type configuration for coupling both emitters with each other, and output control of the amplifier in the initial stage is executed by varying current of a current source coupled to both the emitters.
    Type: Application
    Filed: August 24, 2005
    Publication date: August 2, 2007
    Inventors: Tomonori Tanoue, Masami Ohnishi, Hidetoshi Matsumoto, Akira Kuriyama