Patents by Inventor Masami Tokumitsu

Masami Tokumitsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5652157
    Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower resistance and lower parasitic interactions, an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET. Polyamide film enables an improved fabrication step to be performed in the invention, and a new processing technique for polyimide material has also been demonstrated.
    Type: Grant
    Filed: February 28, 1996
    Date of Patent: July 29, 1997
    Assignee: Nippon Telegraph And Telephone Corporation
    Inventors: Makoto Hirano, Kazuyoshi Asai, Yuhki Imai, Masami Tokumitsu, Tsuneo Tokumitsu, Ichihiko Toyoda
  • Patent number: 5639686
    Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.
    Type: Grant
    Filed: October 7, 1993
    Date of Patent: June 17, 1997
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Hirano, Kazuyoshi Asai, Yuhki Imai, Masami Tokumitsu, Tsuneo Tokumitsu, Ichihiko Toyoda
  • Patent number: 5550068
    Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: August 27, 1996
    Assignee: Nippon Telegraph And Telephone Corporation
    Inventors: Makoto Hirano, Kazuyoshi Asai, Yuhki Imai, Masami Tokumitsu, Tsuneo Tokumitsu, Ichihiko Toyoda
  • Patent number: 5406098
    Abstract: A semiconductor circuit device is disclosed in which an impurity ion implanted region is formed in a substrate, a Schottky junction type gate electrode is formed above the impurity ion implanted region, and a source electrode and a drain electrode are formed on both sides of the gate electrode. In this device, an InGaP barrier layer is formed between the substrate and the electrodes, a cap layer comprising a semiconductor free from In as a constituent is formed between the InGaP barrier layer and the electrodes, and the gate electrode is formed of a refractory metal.
    Type: Grant
    Filed: August 3, 1994
    Date of Patent: April 11, 1995
    Assignee: Nippon Telegraph & Telephone Corporation
    Inventors: Fumiaki Hyuga, Kenji Shiojima, Tatsuo Aoki, Kazuyoshi Asai, Masami Tokumitsu, Kazumi Nishimura, Yasuro Yamane
  • Patent number: 5369043
    Abstract: A semiconductor circuit device is disclosed in which an impurity ion implanted region is formed in a substrate, a Schottky junction type gate electrode is formed above the impurity ion implanted region, and a source electrode and a drain electrode are formed on both sides of the gate electrode. In this device, an InGaP barrier layer is formed between the substrate and the electrodes, a cap layer comprising a semiconductor free from In as a constituent is formed between the InGaP barrier layer and the electrodes, and the gate electrode is formed of a refractory metal.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: November 29, 1994
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Fumiaki Hyuga, Kenji Shiojima, Tatsuo Aoki, Kazuyoshi Asai, Masami Tokumitsu, Kazumi Nishimura, Yasuro Yamane
  • Patent number: 5281769
    Abstract: A new design concept is presented and demonstrated for the fabrication of active and passive components in integrated circuit (IC) devices for microwave signal transmission. High circuit packing density is desirable but the current configurations of the conventional flat strip type conductors present physical limitations to achieving such an objective. The new conductor configuration not only overcomes such circuit packing problems of the conventional line design, but provides additional improvements in performance parameters, such as lower circuit resistance and lower parasitic interactions; an ability to fabricate circuits to design specifications and to improve reliability at low cost. The new concept has been applied to the fabrication of transmission lines, capacitors, inductors, air bridges and to formulating the fabrication steps for a FET.
    Type: Grant
    Filed: November 4, 1991
    Date of Patent: January 25, 1994
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Hirano, Kazuyoshi Asai, Yuhki Imai, Masami Tokumitsu, Tsuneo Tokumitsu, Ichihiko Toyoda