Patents by Inventor Masami Urano

Masami Urano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200256804
    Abstract: A defect inspection apparatus includes: an illumination unit configured to illuminate an inspection object region of a sample with light emitted from a light source; a detection unit configured to detect scattered light in a plurality of directions, which is generated from the inspection object region; a photoelectric conversion unit configured to convert the scattered light detected by the detection unit into an electrical signal; and a signal processing unit configured to process the electrical signal converted by the photoelectric conversion unit to detect a defect in the sample. The detection unit includes an imaging unit configured to divide an aperture and form a plurality of images on the photoelectric conversion unit. The signal processing unit is configured to synthesize electrical signals corresponding to the plurality of formed images to detect a defect in the sample.
    Type: Application
    Filed: February 16, 2018
    Publication date: August 13, 2020
    Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Toshifumi HONDA, Shunichi MATSUMOTO, Masami MAKUUCHI, Yuta URANO, Keiko OKA
  • Patent number: 9894007
    Abstract: A write preference determination unit (30A) compares a reception rate of packets received from the lines of a first network (NW1) with a reception rate threshold for write preference determination, and in a case where the reception rate exceeds the reception rate threshold, determines that preference of a write operation is necessary. A write preference control unit (30B) increases, out of a total access bandwidth of a packet buffer (BUF), a write bandwidth for a packet write operation to the packet buffer (BUF) as compared to a read bandwidth for a packet read operation from the packet buffer (BUF) in a case where the write preference determination unit (30A) determines that the preference is necessary, thereby preferentially executing the packet write operation to the packet buffer. This suppresses occurrence of linked discard of reception packets caused by a shortage of the write bandwidth.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: February 13, 2018
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yasuyuki Itoh, Sadayuki Yasuda, Shoko Ohteru, Masami Urano, Tsugumichi Shibata
  • Patent number: 9699083
    Abstract: A frame search processing apparatus includes a frame information extraction unit (1) that extracts frame information from an input frame, a search processing unit (2) that compares the frame information with entry information, and a frame information output control unit (3) that controls output of the frame information to the search processing unit (2). The search processing unit (2) includes a plurality of comparison units that read out N pieces of entry information from a search table, and perform comparison between the entry information and the frame information at once.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: July 4, 2017
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yuki Arikawa, Kenji Kawai, Yukikuni Nishida, Masami Urano, Keiichi Koike
  • Patent number: 9401875
    Abstract: A packet transfer processing device includes common processing units that perform processing common to inbound processing of a packet received from an access network for transfer to a core network and outbound processing of a packet received from the core network for transfer to the access network, an input destination switching unit that selects common processing units to which the received packets are to be input, an output destination switching unit that outputs packets processed by the common processing units to a destination network, an individual processing switching unit that selects a common processing unit to connect to an individual processing unit that performs individual processing not performed by the common processing units as part of inbound processing, and a control unit that controls the input destination switching unit, the individual processing switching unit, and switching supply/shutoff of power to the common processing units.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: July 26, 2016
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Sadayuki Yasuda, Masami Urano, Tsugumichi Shibata
  • Publication number: 20160127249
    Abstract: A write preference determination unit (30A) compares a reception rate of packets received from the lines of a first network (NW1) with a reception rate threshold for write preference determination, and in a case where the reception rate exceeds the reception rate threshold, determines that preference of a write operation is necessary. A write preference control unit (30B) increases, out of a total access bandwidth of a packet buffer (BUF), a write bandwidth for a packet write operation to the packet buffer (BUF) as compared to a read bandwidth for a packet read operation from the packet buffer (BUF) in a case where the write preference determination unit (30A) determines that the preference is necessary, thereby preferentially executing the packet write operation to the packet buffer. This suppresses occurrence of linked discard of reception packets caused by a shortage of the write bandwidth.
    Type: Application
    Filed: June 23, 2014
    Publication date: May 5, 2016
    Inventors: Yasuyuki Itoh, Sadayuki Yasuda, Shoko Ohteru, Masami Urano, Tsugumichi Shibata
  • Patent number: 9271233
    Abstract: A child station (3) of a communication system performs communication while synchronizing the reference time of a parent station (2) with the local time (RT) of the child station (3). When the child station (3) is switched from a normal mode to a power saving mode in accordance with a mode change instruction from the parent station (2), correction is performed for one or both of a stop period in which the apparatus of the child station (3) is stopped and a non-stop period in the power saving mode using an error (?t) generated during the time between the reference time of the parent station (2) and the local time (RT) of the child station (3). This makes it possible to synchronize the parent station (2) with the child station (3) and reliably and efficiently transfer a control frame (CF) from the parent station (2) to the child station (3).
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: February 23, 2016
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Naoki Miura, Nobuyuki Tanaka, Takeshi Sakemoto, Masami Urano, Mamoru Nakanishi
  • Patent number: 9178616
    Abstract: Identifier information (LLID) of an ONU and transfer instruction information indicating a transmission system as the output destination of a downstream frame are registered in a table (22) in correspondence with each of the destination IDs of the ONUs or user apparatuses connected to the ONUs. Upon receiving a downstream frame from a host apparatus, a frame transfer processing unit (20) acquires an LLID and transfer instruction information corresponding to the destination ID of the downstream frame from the table (22).
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: November 3, 2015
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Tomoaki Kawamura, Shoko Ohteru, Ritsu Kusaba, Masami Urano, Mamoru Nakanishi
  • Publication number: 20150171965
    Abstract: Out of one constantly fed block (B0) and one power saving block (B1) provided by dividing in advance circuit units constituting an OLT (10), a power supply control unit (40) constantly supplies power to circuit units belonging to the constantly fed block. For circuit units belonging to the power saving block, the power supply control unit starts power supply to the power saving block starts in synchronism with the start of the period of an upstream bandwidth allocated to each ONU, and stops the power supply to the power saving block in synchronism with the end of the period of the upstream bandwidth. The power supply control unit starts power supply at a timing specified based on the start timing of the upstream bandwidth, and stops the power supply at a timing decided based on the end timing of the upstream bandwidth. This reduces the power consumption of an overall OLT.
    Type: Application
    Filed: June 4, 2013
    Publication date: June 18, 2015
    Inventors: Shoko Ohteru, Tomoaki Kawamura, Masami Urano, Mamoru Nakanishi, Ritsu Kusaba, Junichi Kato, Sadayuki Yasuda, Hiroyuki Uzawa, Yuki Arikawa
  • Publication number: 20150146740
    Abstract: A packet transfer processing device includes a common processing unit (2, 3) that performs processing sharable in inbound processing that receives a packet from an access network and transfers the packet to a core network and outbound processing that receives a packet from the core network and transfers the packet to the access network, an input destination switching unit (5) that selects a common processing unit to which the packets received from the access network and the core network are to be input, an output destination switching unit (6) that outputs the packet processed by the common processing unit (2, 3) to a network of a transfer destination, an individual processing switching unit (7) that selects which common processing unit is to be connected to an individual processing unit (10) that performs first individual processing nonsharable by the common processing unit (2, 3) out of the inbound processing, and a control unit (4) that performs control of the input destination switching unit (5), control
    Type: Application
    Filed: May 31, 2013
    Publication date: May 28, 2015
    Inventors: Sadayuki Yasuda, Masami Urano, Tsugumichi Shibata
  • Publication number: 20140376553
    Abstract: A frame search processing apparatus includes a frame information extraction unit (1) that extracts frame information from an input frame, a search processing unit (2) that compares the frame information with entry information, and a frame information output control unit (3) that controls output of the frame information to the search processing unit (2). The search processing unit (2) includes a plurality of comparison units that read out N pieces of entry information from a search table, and perform comparison between the entry information and the frame information at once.
    Type: Application
    Filed: February 12, 2013
    Publication date: December 25, 2014
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yuki Arikawa, Kenji Kawai, Yukikuni Nishida, Masami Urano, Keiichi Koike
  • Publication number: 20140185504
    Abstract: A child station (3) of a communication system performs communication while synchronizing the reference time of a parent station (2) with the local time (RT) of the child station (3). When the child station (3) is switched from a normal mode to a power saving mode in accordance with a mode change instruction from the parent station (2), correction is performed for one or both of a stop period in which the apparatus of the child station (3) is stopped and a non-stop period in the power saving mode using an error (?t) generated during the time between the reference time of the parent station (2) and the local time (RT) of the child station (3). This makes it possible to synchronize the parent station (2) with the child station (3) and reliably and efficiently transfer a control frame (CF) from the parent station (2) to the child station (3).
    Type: Application
    Filed: June 22, 2012
    Publication date: July 3, 2014
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Naoki Miura, Nobuyuki Tanaka, Takeshi Sakemoto, Masami Urano, Mamoru Nakanishi
  • Publication number: 20140105602
    Abstract: Identifier information (LLID) of an ONU and transfer instruction information indicating a transmission system as the output destination of a downstream frame are registered in a table (22) in correspondence with each of the destination IDs of the ONUs or user apparatuses connected to the ONUs. Upon receiving a downstream frame from a host apparatus, a frame transfer processing unit (20) acquires an LLID and transfer instruction information corresponding to the destination ID of the downstream frame from the table (22).
    Type: Application
    Filed: June 27, 2012
    Publication date: April 17, 2014
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Tomoaki Kawamura, Shoko Ohteru, Ritsu Kusaba, Masami Urano, Mamoru Nakanishi
  • Patent number: 7548636
    Abstract: A response signal generating unit (3) applies a predetermined supply signal (2S) to a detection element (1) and outputs, as a response signal (3S), a signal which has changed in accordance with the impedance of an object (10) with which the unit is in contact through the detection element (1). A waveform information detection unit (4) detects waveform information corresponding to the impedance of the object (10) on the basis of the response signal (3S) from the response signal generating unit (3), and outputs a detection signal (4S) representing the waveform information. A biometric recognition unit (5) determines on the basis of the detection signal (4S) from the waveform information detection unit (4) whether or not the object (10) is a living body.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: June 16, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Toshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Norio Sato, Masami Urano, Katsuyuki Machida
  • Patent number: 7508963
    Abstract: A detection element (1A) having a detection electrode (11A) connected to a surface shape detection unit (2) and a detection electrode (12A) connected to a common potential, and a detection element (1B) having a detection electrode (11B) connected to the surface shape detection unit (2) and a detection electrode (12B) connected to a biometric recognition unit (3) are arranged. The surface shape detection unit (2) outputs a signal representing the three-dimensional pattern of the surface shape corresponding to the contact portion to each detection element on the basis of individual capacitances obtained from the detection elements (1A, 1B). The biometric recognition unit (3) determines whether an object (9) is a living body, on the basis of a signal corresponding to the impedance of the object (9) connected between the detection electrode (12B) of the detection element (1B) and the detection electrode (12A) of the detection element (1A).
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: March 24, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Toshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Norio Sato, Masami Urano, Katsuyuki Machida
  • Patent number: 7482196
    Abstract: In a semiconductor device having a MEMS according to this invention, a plurality of units having movable portions for constituting a MEMS are monolithically mounted on a semiconductor substrate on which an integrated circuit including a driving circuit, sensor circuit, memory, and processor is formed. Each unit has a processor, memory, driving circuit, and sensor circuit.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: January 27, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Masami Urano, Hiromu Ishii, Toshishige Shimamura, Yasuyuki Tanabe, Katsuyuki Machida, Tomomi Sakata
  • Publication number: 20080187192
    Abstract: A detection element (1A) having a detection electrode (11A) connected to a surface shape detection unit (2) and a detection electrode (12A) connected to a common potential, and a detection element (1B) having a detection electrode (11B) connected to the surface shape detection unit (2) and a detection electrode (12B) connected to a biometric recognition unit (3) are arranged. The surface shape detection unit (2) outputs a signal representing the three-dimensional pattern of the surface shape corresponding to the contact portion to each detection element on the basis of individual capacitances obtained from the detection elements (1A, 1B). The biometric recognition unit (3) determines whether an object (9) is a living body, on the basis of a signal corresponding to the impedance of the object (9) connected between the detection electrode (12B) of the detection element (1B) and the detection electrode (12A) of the detection element (1A).
    Type: Application
    Filed: March 28, 2008
    Publication date: August 7, 2008
    Inventors: Toshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Norio Sato, Masami Urano, Katsuyuki Machida
  • Patent number: 7366332
    Abstract: A detection element (1A) having a detection electrode (11A) connected to a surface shape detection unit (2) and a detection electrode (12A) connected to a common potential, and a detection element (1B) having a detection electrode (11B) connected to the surface shape detection unit (2) and a detection electrode (12B) connected to a biometric recognition unit (3) are arranged. The surface shape detection unit (2) outputs a signal representing the three-dimensional pattern of the surface shape corresponding to the contact portion to each detection element on the basis of individual capacitances obtained from the detection elements (1A, 1B). The biometric recognition unit (3) determines whether an object (9) is a living body, on the basis of a signal corresponding to the impedance of the object (9) connected between the detection electrode (12B) of the detection element (1B) and the detection electrode (12A) of the detection element (1A).
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: April 29, 2008
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Toshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Norio Sato, Masami Urano, Katsuyuki Machida
  • Patent number: 7208809
    Abstract: In a semiconductor device having a MEMS according to this invention, a plurality of units having movable portions for constituting a MEMS are monolithically mounted on a semiconductor substrate on which an integrated circuit including a driving circuit, sensor circuit, memory, and processor is formed. Each unit has a processor, memory, driving circuit, and sensor circuit.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: April 24, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Masami Urano, Hiromu Ishii, Toshishige Shimamura, Yasuyuki Tanabe, Katsuyuki Machida, Tomomi Sakata
  • Patent number: 7189625
    Abstract: In a micromachine according to this invention, a polyimide film is formed on the surface of each electrode. The polyimide film is formed as follows. A substrate having each electrode and a counterelectrode are dipped in an electrodeposition polyimide solution, and a positive voltage is applied to the electrode. A material dissolved in the electrodeposition polyimide solution is deposited on a surface of the positive-voltage-applied electrode that is exposed in the solution, thus forming a polyimide film on the surface.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: March 13, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiromu Ishii, Yasuyuki Tanabe, Katsuyuki Machida, Masami Urano, Shouji Yagi, Tomomi Sakata
  • Publication number: 20060115920
    Abstract: In a semiconductor device having a MEMS according to this invention, a plurality of units having movable portions for constituting a MEMS are monolithically mounted on a semiconductor substrate on which an integrated circuit including a driving circuit, sensor circuit, memory, and processor is formed. Each unit has a processor, memory, driving circuit, and sensor circuit.
    Type: Application
    Filed: January 11, 2006
    Publication date: June 1, 2006
    Inventors: Masami Urano, Hiromu Ishii, Toshishige Shimamura, Yasuyuki Tanabe, Katsuyuki Machida, Tomomi Sakata