Patents by Inventor Masami Yokozawa

Masami Yokozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6335223
    Abstract: A lead frame used for a resin-sealed semiconductor device includes a die-mount portion on which a semiconductor chip rests; and a plurality of leads arranged along a common portion of the lead frame. The plurality of leads include at least one adjusting lead, and the adjusting lead has a length that is less than the others of the plurality of leads such that a tip of the adjusting lead is sufficiently proximate to an outer peripheral surface of a resin-seal body to prevent resin flash during a formation of the semiconductor device and to allow the adjusting lead to be removed after the resin-seal body is formed over a portion of the lead frame.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: January 1, 2002
    Assignee: Matsushita Electronics Corporation
    Inventors: Kouji Takada, Masami Yokozawa, Hiroyoshi Yoshida, Shigeki Sakaguchi
  • Patent number: 6215174
    Abstract: A lead frame used for a resin-sealed semiconductor device includes a die-mount portion on which a semiconductor chip rests; and a plurality of leads arranged along a common portion of the lead frame. The plurality of leads include at least one adjusting lead, and the adjusting lead has a length that is less than the others of the plurality of leads such that a tip of the adjusting lead is sufficiently proximate to an outer peripheral surface of a resin-seal body to prevent resin flash during a formation of the semiconductor device and to allow the adjusting lead to be removed after the resin-seal body is formed over a portion of the lead frame.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: April 10, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Kouji Takada, Masami Yokozawa, Hiroyoshi Yoshida, Shigeki Sakaguchi
  • Patent number: 6187114
    Abstract: This invention provides a lead-free high temperature solder material comprising 0.005-3.0 wt % of palladium (Pd) and 97.0-99.995 wt % of tin (Sn) whose liquidus temperature is 200-350° C. The solder material is environmentally-friendly, improved in thermal fatigue property, and it can improve the reliability of electronic apparatuses. A predetermined amount of Sn material and Pd is mixed, vacuum-melted and cast to prepare an ingot. The ingot is rolled to be a tape that is later pressed to obtain a solder pellet. In a preferable composition, at least 95 wt % of Sn and 0.005-3.0 wt 5 of Pd are contained, and 0.1-5.0 wt % of metallic (e.g. Cu, Ni) or alloy particles are added. The average particle diameter is about 40 &mgr;m. A substrate and an IC chip (electronic element) are die-bonded substantially in parallel by a solder material provided between an Ni plating on the lower side of an IC chip (semiconductor) and an Ni plating on a die.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: February 13, 2001
    Assignees: Matsushita Electric Industrial Co. Ltd., Tanaka Denshi Kogyo K.K.
    Inventors: Toshinori Ogashiwa, Takatoshi Arikawa, Masami Yokozawa, Kazuhiro Aoi, Yoshiharu Sawada
  • Patent number: 5629551
    Abstract: A semiconductor device includes on a semiconductor substrate an output transistor which is composed of a collector region, a first base region and a first emitter region, and a temperature detection transistor composed of the collector region, a second base region and a second emitter region. The output transistor is provided at a center of the collector region of the semiconductor substrate. A vacant region is formed on a center of the output transistor, and the temperature detection transistor is provided in the vacant region.
    Type: Grant
    Filed: July 18, 1995
    Date of Patent: May 13, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideaki Nakura, Masami Yokozawa, Kazuhiko Tsubaki, Masasuke Yoshimura
  • Patent number: 5461252
    Abstract: A semiconductor device includes on a semiconductor substrate an output transistor which is composed of a collector region, a first base region and a first emitter region, and a temperature detection transistor composed of the collector region, a second base region and a second emitter region. The output transistor is provided at a center of the collector region of the semiconductor substrate. A vacant region is formed on a center of the output transistor, and the temperature detection transistor is provided in the vacant region.
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: October 24, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideaki Nakura, Masami Yokozawa, Kazuhiko Tsubaki, Masasuke Yoshimura
  • Patent number: 5298793
    Abstract: There is disclosed a semiconductor device having an electrode for wire bonding, comprising a first aluminum layer, a nickel-aluminum alloy layer, and a second aluminum layer. The electrode is suitable for bonding with copper wire, since the electrode withstands a wide range of bonding conditions--mechanical pressure, ultrasonic wave power and such, and permits a reliable electrical connection to be maintained.
    Type: Grant
    Filed: August 13, 1992
    Date of Patent: March 29, 1994
    Assignee: Matsushita Electronics Corporation
    Inventors: Jutaro Kotani, Masahiro Ihara, Hideaki Nakura, Masami Yokozawa
  • Patent number: 4589010
    Abstract: A method for manufacturing a plastic encapsulated semiconductor device is provided which comprises the steps of: clamping by upper and lower molds at least external leads and strips of a semiconductor device assembly formed using a lead frame which has a first connecting band connected to the external leads extending from one side of a substrate support further used as a heat sink, and a second connecting band connected to the strips having portions of small cross-sectional areas and of a predetermined length and extending from the other side of the substrate support, the cross sections being perpendicular to an extending direction of the strips, so that the substrate support may float in a cavity formed by the upper and lower molds and parts of the portions of small cross-sectional areas may be disposed in the cavity and the remaining parts thereof may be disposed between the upper and lower molds; injecting a plastic into the cavity; and cutting the portions of small cross-sectional areas of the strips whic
    Type: Grant
    Filed: February 17, 1984
    Date of Patent: May 13, 1986
    Assignee: Matsushita Electronics Corporation
    Inventors: Kenichi Tateno, Masami Yokozawa, Hiroyuki Fujii, Mikio Nishikawa, Michio Katoh, Fujio Wada
  • Patent number: 4503452
    Abstract: A plastic encapsulated semiconductor device and a method for manufacturing the same are provided. A substrate support supports a semiconductor substrate and serves as a heat sink. Strips are connected to one side of the substrate support and an external lead is connected to the opposite side of the substrate support. Parts of the strips extend from one side surface of a plastic encapsulating housing. At least one notch or recess is formed in one side surface of the plastic encapsulating housing. The strips are then cut within at least one notch or recess so as not to extend the cut surfaces of the strips from the outermost side surface portion of the encapsulating housing.
    Type: Grant
    Filed: May 14, 1982
    Date of Patent: March 5, 1985
    Assignee: Matsushita Electronics Corporation
    Inventors: Masami Yokozawa, Isao Kanai
  • Patent number: 4482915
    Abstract: The invention provides a lead frame for a plastic encapsulated semiconductor device wherein one of the external leads connected to a first connecting band extends from one edge of a substrate support which supports a semiconductor substrate and also serves as a heat sink, two strips are connected to a second connecting band from the other edge of the substrate support, a notch is formed between the two strips of the second connecting band to allow proper positioning of the lead frame and to decrease thermal deformation during plastic encapsulation. Further, another lead frame is provided wherein a through hole is formed extending within the substrate support in the direction of thickness thereof in order to allow uniform flow of the resin and to form a thin resin layer on the rear surface of the substrate support.
    Type: Grant
    Filed: July 6, 1982
    Date of Patent: November 13, 1984
    Assignee: Matsushita Electronics Corp.
    Inventors: Mikio Nishikawa, Hiroyuki Fujii, Kenichi Tateno, Masami Yokozawa
  • Patent number: 4451973
    Abstract: A method for manufacturing a plastic encapsulated semiconductor device is provided which comprises the steps of: clamping by upper and lower molds at least external leads and strips of a semiconductor device assembly formed using a lead frame which has a first connecting band connected to the external leads extending from one side of a substrate support further used as a heat sink, and a second connecting band connected to the strips having portions of small cross-sectional areas and of a predetermined length and extending from the other side of the substrate support, the cross sections being perpendicular to an extending direction of the strips, so that the substrate support may float in a cavity formed by the upper and lower molds and parts of the portions of small cross-sectional areas may be disposed in the cavity and the remaining parts thereof may be disposed between the upper and lower molds; injecting a plastic into the cavity; and cutting the portions of small cross-sectional areas of the strips whic
    Type: Grant
    Filed: April 13, 1982
    Date of Patent: June 5, 1984
    Assignee: Matsushita Electronics Corporation
    Inventors: Kenichi Tateno, Masami Yokozawa, Hiroyuki Fujii, Mikio Nishikawa, Michio Katoh, Fujio Wada