Patents by Inventor Masami Yusa

Masami Yusa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6762249
    Abstract: The present invention provides a wiring-connecting material comprising from 2 to 75 parts by weight of a polyurethane resin, from 30 to 60 parts by weight of a radical-polymerizable substance and from 0.1 to 30 parts by weight of a curing agent capable of generating a free radical upon heating, and a process for producing a wiring-connected board by using the wiring-connecting material. The wiring-connecting material of the present invention may preferably further contain a film-forming material and/or conductive particles.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: July 13, 2004
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Tohru Fujinawa, Masami Yusa, Satoyuki Nomura, Hiroshi Ono, Itsuo Watanabe, Motohiro Arifuku, Hoko Kanazawa
  • Patent number: 6717242
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 Mpa or less at a temperature of 259° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: April 6, 2004
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20030178138
    Abstract: The present invention relates to a method for connecting electrodes comprising: interposing the polyphthalide represented by the formula (I): 1
    Type: Application
    Filed: January 16, 2003
    Publication date: September 25, 2003
    Inventors: Isao Tsukagoshi, Yasushi Gotou, Masami Yusa, Yasuo Miyadera
  • Publication number: 20030160337
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: May 2, 2003
    Publication date: August 28, 2003
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20030141014
    Abstract: There are provided an adhesive for connecting a circuit to be interposed between substrates having circuit electrodes thereon opposed to each other and to electrically connect the circuit electrodes on the substrates opposed to each other to the pressurizing direction under pressure, wherein the adhesive contains a compound having an acid equivalent of 5 to 500 KOH mg/g, and an adhesive for connecting a circuit to be interposed between substrates having circuit electrodes opposed to each other and to electrically connect the electrodes on the substrate opposed to each other to the pressurizing direction under pressure, wherein the adhesive comprises a first adhesive layer and a second adhesive layer, and a glass transition temperature of the first adhesive layer after pressure connection is higher than the glass transition temperature of the second adhesive layer after pressure connection.
    Type: Application
    Filed: October 25, 2002
    Publication date: July 31, 2003
    Inventors: Nomura Satoyuki, Tohru Fujinawa, Hiroshi Ono, Hoko Kanazawa, Masami Yusa
  • Publication number: 20030027942
    Abstract: The present invention relates to a resin composition which gives a resin product with a low hygroscopic property, an adhesive for connecting a circuit member and a circuit board, and provides a resin composition, an adhesive for connecting a circuit member and a circuit board comprising (A) a polyhydroxy polyether resin represented by the 1
    Type: Application
    Filed: August 9, 2002
    Publication date: February 6, 2003
    Inventors: Satoru Oota, Masami Yusa, Akira Nagai
  • Patent number: 6331729
    Abstract: In the present invention, an insulating film adhesive material is attached onto the wirings in the form of a tent so that an empty space communicating with a vent hole is provided. Use of this chip-supporting substrate makes it possible to produce small-sized semiconductor packages preventive of package cracking and having a high reliability, because the function of the vent hole is not damaged and also gases and water vapor which are generated from the insulating film adhesive material at the time of reflowing can be driven off surely outside the package.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: December 18, 2001
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Masami Yusa, Toshihiko Kato, Fumio Inoue, Shigeki Ichimura
  • Publication number: 20010035533
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: February 20, 2001
    Publication date: November 1, 2001
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20010016384
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: February 20, 2001
    Publication date: August 23, 2001
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Publication number: 20010009780
    Abstract: A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices.
    Type: Application
    Filed: February 20, 2001
    Publication date: July 26, 2001
    Inventors: Shinji Takeda, Takashi Masuko, Masami Yusa, Tooru Kikiuchi, Yasuo Miyadera, Iwao Maekawa, Mitsuo Yamasaki, Akira Kageyama, Aizou Kaneda
  • Patent number: 6236108
    Abstract: A semiconductor packaging chip-supporting substrate of the present invention comprises an insulating supporting substrate, wiring provided on the substrate, and an insulating film provided on the wiring. The wiring each have i) an inner connection that connects to a semiconductor chip electrode and ii) a semiconductor chip-mounting region. An opening is also provided in the insulating supporting substrate at its part where each of the wiring is formed on the insulating supporting substrate, which is the part where an outer connection conducting to the inner connection is provided. The insulating film is formed at the part on which the semiconductor chip is mounted, covering the semiconductor chip-mounting region of the wiring.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: May 22, 2001
    Assignees: Hitachi Chemical Company, Ltd., Sharp Corporation
    Inventors: Yoshiki Sota, Koji Miyata, Toshio Yamazaki, Fumio Inoue, Hidehiro Nakamura, Yoshiaki Tsubomatsu, Yasuhiko Awano, Shigeki Ichimura, Masami Yusa, Yorio Iwasaki
  • Patent number: 6099678
    Abstract: A laminating method and a machine are provided for successively heating and compression-bonding a film-shaped organic die-bonding material on a leadframe with good productivity but without voids and further to avoid package cracking upon mounting a chip. A leadframe 7 is placed on a travelling table 8 and is heated there. A film-shaped organic die-bonding material 2 is punched out and the resulting film is tack-bonded to a die pad on the leadframe. The leadframe with the film tack-bonded thereon is then moved to a position b by the travelling table. After the film is pressed by a compression-bonding element at the position B, a chip is mounted on the film-shaped organic die-bonding material 2.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: August 8, 2000
    Assignee: Hitachi Chemical Company Ltd.
    Inventors: Akio Kotato, Yuusuke Miyamae, Tadaji Satou, Makoto Saitou, Tooru Kikuchi, Akira Kageyama, Shinji Takeda, Takashi Masuko, Masami Yusa, Yasuo Miyadera, Mituo Yamasaki, Iwao Maekawa, Aizou Kaneda
  • Patent number: 6064111
    Abstract: A semiconductor packaging chip-supporting substrate of the present invention comprises an insulating supporting substrate, wiring provided on the substrate, and an insulating film provided on the wiring. The wiring each have i) an inner connection that connects to a semiconductor chip electrode and ii) a semiconductor chip-mounting region. An opening is also provided in the insulating supporting a substrate at its part where each of the wiring is formed on the insulating supporting substrate, which is the part where an outer connection conducting to the inner connection is provided. The insulating film is formed at the part on which the semiconductor chip is mounted, covering the semiconductor chip-mounting region of the wiring.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: May 16, 2000
    Assignees: Hitachi Company, Ltd., Sharp Corporation
    Inventors: Yoshiki Sota, Koji Miyata, Toshio Yamazaki, Fumio Inoue, Hidehiro Nakamura, Yoshiaki Tsubomatsu, Yasuhiko Awano, Shigeki Ichimura, Masami Yusa, Yorio Iwasaki
  • Patent number: 5667899
    Abstract: An electrically conductive bonding film useful in bonding an IC or LSI with a lead frame. The film comprises (A) a polyimide resin obtained by reacting a tetracarboxylic dianhydride component, in which the content of a tetracarboxylic dianhydride represented by the following formula (I): ##STR1## wherein n stands for an integer of 2-20 amounts to at least 70 mole %, with a diamine; and (B) an electrically conductive filler. Optionally, the film may further comprises a thermosetting resin or an imide compound having at least two thermally-crosslinking imido groups per molecule.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 16, 1997
    Assignee: Hitachi Chemical Co. Ltd.
    Inventors: Masami Yusa, Shinji Takeda, Takashi Masuko, Yasuo Miyadera, Mitsuo Yamazaki
  • Patent number: 5605763
    Abstract: Described is an electrically conductive bonding film useful in bonding an IC or LSI with a lead frame. The film comprises (A) a polyimide resin obtained by reacting a tetracarboxylic dianhydride component, in which the content of a tetracarboxylic dianhydride represented by the following formula (I): ##STR1## wherein n stands for an integer of 2-20 amounts to at least 70 mole %, with a diamine; (B) an electrically conductive filler, and a thermoset resin. Optionally, the film may further comprises a thermosetting resin or an imide compound having at least two thermally-crosslinking imido groups per molecule.
    Type: Grant
    Filed: November 20, 1995
    Date of Patent: February 25, 1997
    Assignee: Hitachi Chemical Company Ltd.
    Inventors: Masami Yusa, Shinji Takeda, Takashi Masuko, Yasuo Miyadera, Mitsuo Yamazaki
  • Patent number: 5571579
    Abstract: An alignment film for liquid crystal is provided which comprises a polyimide comprising a repeating unit of the general formula (I): ##STR1## wherein n is an integer of from 2 to 16 and R.sup.1 represents a divalent organic group. This polyimide is obtained for example, from a reaction between ethylene glycol bis(trimellitate dianhydride) and 4,4'-diaminodiphenyl ether. This polyimide or a varnish of a precursor thereof is coated on a plate, and dried to obtain an alignment film for liquid crystal, which stably exhibits a high pretilt angle, irrespective of curing temperatures. The present invention further provides a liquid crystal-sandwiched panel and a liquid crystal display module prepared using the alignment film as well as a material for the preparation of the alignment film.
    Type: Grant
    Filed: October 19, 1994
    Date of Patent: November 5, 1996
    Assignee: Hitachi Chemical Company, Ltd
    Inventors: Toshihiko Kato, Masami Yusa, Nobuo Miyadera, Hideyuki Hashimoto, Yasuo Miyadera, Masahiro Kawakami
  • Patent number: 5401878
    Abstract: A fluorine-containing polyimide having a low dielectric constant, low water absorption and excellent heat resistance and moisture resistance and a precursor thereof such as a fluorine-containing polyamide-acid, can be prepared by reacting an acid anhydride with an aromatic diamine having perfluoroalkyl group.
    Type: Grant
    Filed: September 1, 1993
    Date of Patent: March 28, 1995
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Masami Yusa, Shinji Takeda, Yasuo Miyadera
  • Patent number: 5270438
    Abstract: A fluorine-containing polyimide having a low dielectric constant, low water absorption and excellent heat resistance and moisture resistance and a precursor thereof such as a fluorine-containing polyamide-acid, can be prepared by reacting an acid anhydride with an aromatic diamine having perfluoroalkyl group.
    Type: Grant
    Filed: April 3, 1991
    Date of Patent: December 14, 1993
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Masami Yusa, Shinji Takeda, Yasuo Miyadera
  • Patent number: 5243019
    Abstract: A fluorine-containing aromatic polyamide obtained by reacting an aromatic dicarboxylic acid having a perfluoroalkenyloxy group with a diamine is excellent in water repellency, water resistance, heat resistance, etc.
    Type: Grant
    Filed: March 25, 1991
    Date of Patent: September 7, 1993
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Shinji Takeda, Masami Yusa, Yasuo Miyadera
  • Patent number: 5115089
    Abstract: Disclosed herein are processes for the preparation of polyimide-isoindroquinazolinediones and precursor thereof. These polymers are useful as heat-resistant electric insulation materials, surface coating films for electronic instrument parts and especially suitable for manufacturing a photoresist. The above precursor is produced by reacting a an alkylenebistrimellitate dianhydride, a diaminoamide compound and the other amine. The precursor is readily dehydrated and ring-closed to produce polyimide-isoindroquinazolinedione, which is often conveniently conducted by producing a varnish of the precursor, applying it onto adequate substrates such as silicon wafers, glass plates, metal plates, etc. and then subjecting the coated film to dehydration. The resulting films have excellent physical properties such as good adherence, high tensile strength, low elasticity, etc.
    Type: Grant
    Filed: September 16, 1988
    Date of Patent: May 19, 1992
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Masatoshi Yoshida, Katsuji Shibata, Mitsumasa Kojima, Hidetaka Satou, Toshihiko Kato, Yasuo Miyadera, Masami Yusa