Patents by Inventor Masamichi Shimoda
Masamichi Shimoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8531376Abstract: There is disclosed a shift register comprising a bootstrap circuit that outputs a voltage of the supply voltage to the output when the voltage of a first node becomes higher or lower than the supply voltage. The shift register comprises: two or more transistors connected in series to the first node; a device for supplying the voltage to a second node between the transistors such that the voltage between the drains and sources of the transistors becomes below the supply voltage; a first input transistor connected to the first node, and the gate electrode thereof is connected to a first input terminal as well; and an output transistor connected to the output terminal and the clock signal while having the gate electrode connected to the first node, wherein the gate electrode of the output transistor is not opened except for the bootstrap period.Type: GrantFiled: May 22, 2006Date of Patent: September 10, 2013Assignee: NLT Technologies, Ltd.Inventor: Masamichi Shimoda
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Patent number: 8427620Abstract: A liquid crystal display device of IPS mode includes an array of pixels arranged in a matrix pattern by crossing a plurality of video signal lines and a plurality of scanning signal lines each other. Each of the pixels is provided with at least a switching element. A transparent insulating film is provided on both signal lines, and a plurality of pixel electrodes, common electrodes and common lines are provided on the transparent insulating film. The common lines are formed in a grid-shaped pattern such that a first group of the common lines is made of a first conductor having lower reflectivity against optical light than that of metal while a second group of the common lines is made of a second conductor including a metal layer such that the first group and the second group are crossing each other along the video signal lines and the scanning signal lines.Type: GrantFiled: February 16, 2010Date of Patent: April 23, 2013Assignee: NLT Technologies, Ltd.Inventors: Soichi Saito, Shinya Niioka, Masayuki Jumonji, Hiroshi Tanabe, Masamichi Shimoda
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Publication number: 20120112992Abstract: Disclosed is a display apparatus including two scanning circuits of the same configuration and layout, arranged on either sides of the display part. As long as one of the scanning circuits is in operation, the other scanning circuit is in a state in which no output signal is output.Type: ApplicationFiled: December 29, 2011Publication date: May 10, 2012Applicant: NLT TECHNOLOGIES, LTDInventors: TOMOHIKO OTOSE, MASAMICHI SHIMODA
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Patent number: 7889832Abstract: Disclosed is a shift register which includes first transistor connected between a first clock signal terminal and an output terminal, a second transistor with a gate connected to an input terminal and a source connected to a gate of the first transistor, a third transistor with a gate connected to a second clock signal terminal, an inverter with an input connected to the input terminal, a fourth transistor cascode connected to the third transistor with a gate connected to an output of the inverter, a fifth transistor connected between the gate of the first transistor and a power supply terminal, a sixth transistor connected between the fourth transistor and the power supply terminal with a gate connected to the input terminal, and a seventh transistor connected between the output terminal and the power supply terminal, the fifth and seventh transistors having gates connected in common to a connection node of the fourth and the sixth transistors.Type: GrantFiled: May 22, 2009Date of Patent: February 15, 2011Assignee: NEC LCD Technologies, Ltd.Inventors: Tomohiko Otose, Masamichi Shimoda
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Publication number: 20100208187Abstract: A liquid crystal display device of IPS mode includes an array of pixels arranged in a matrix pattern by crossing a plurality of video signal lines and a plurality of scanning signal lines each other. Each of the pixels is provided with at least a switching element. A transparent insulating film is provided on both signal lines, and a plurality of pixel electrodes, common electrodes and common lines are provided on the transparent insulating film. The common lines are formed in a grid-shaped pattern such that a first group of the common lines is made of a first conductor having lower reflectivity against optical light than that of metal while a second group of the common lines is made of a second conductor including a metal layer such that the first group and the second group are crossing each other along the video signal lines and the scanning signal lines.Type: ApplicationFiled: February 16, 2010Publication date: August 19, 2010Applicant: NEC LCD Technologies, Ltd.Inventors: Soichi Saito, Shinya Niioka, Masayuki Jumonji, Hiroshi Tanabe, Masamichi Shimoda
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Patent number: 7633335Abstract: A current source circuit includes a voltage output section which outputs a voltage signal; a current source section and a conversion section. The current source section has at least one current source block comprising a plurality of current sources, each of which outputs an output current. The conversion section is provided between the voltage output section and the current source section and outputs a reference current to the plurality of current sources of the at least one current source block based on the voltage signal such that the output current from each of the plurality of current sources is set based on the reference current.Type: GrantFiled: April 30, 2008Date of Patent: December 15, 2009Assignees: NEC Electronics Corporation, NEC CorporationInventors: Katsuyuki Fujikura, Katsumi Abe, Masamichi Shimoda
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Publication number: 20090290677Abstract: Disclosed is a shift register which includes first transistor connected between a first clock signal terminal and an output terminal, a second transistor with a gate connected to an input terminal and a source connected to a gate of the first transistor, a third transistor with a gate connected to a second clock signal terminal, an inverter with an input connected to the input terminal, a fourth transistor cascode connected to the third transistor with a gate connected to an output of the inverter, a fifth transistor connected between the gate of the first transistor and a power supply terminal, a sixth transistor connected between the fourth transistor and the power supply terminal with a gate connected to the input terminal, and a seventh transistor connected between the output terminal and the power supply terminal, the fifth and seventh transistors having gates connected in common to a connection node of the fourth and the sixth transistors.Type: ApplicationFiled: May 22, 2009Publication date: November 26, 2009Applicant: NEC LCD Technologies, Ltd.Inventors: Tomohiko Otose, Masamichi Shimoda
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Publication number: 20090115792Abstract: A device, in which circuit size is small and operation is stable, comprises a plurality of serially connected unit registers (shift registers) in which transfer is controlled by any of three or more clock signals each having a different phase, and a setting signal which determines shift direction; and a selection circuit (switch array) which can select at least one clock signal from the three or more clock signals in accordance with the setting signal; wherein the unit registers are put in a reset state by one clock signal selected by the selection circuit, corresponding to each of the unit registersType: ApplicationFiled: November 4, 2008Publication date: May 7, 2009Applicant: NEC LCE TECHNOLOGIES, LTD.Inventors: Tomohiko OTOSE, Masamichi Shimoda
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Patent number: 7515150Abstract: A semiconductor device is capable of suppressing variations of a current or a voltage to be supplied to an external circuit. The semiconductor device has a plurality of unit areas arrayed in one direction, and components in the unit areas are arranged in the same shape and the same layout in the unit areas. A holding capacitor for holding a voltage is surrounded by an interconnect kept at ground potential. Interconnects at ground potential are inserted in areas where reference current interconnects for supplying reference currents to functional blocks (1-bit DCC circuit regions) and gradation digital data interconnects and storage timing signal interconnects cross each other vertically, the interconnects being disposed between these reference current interconnects, gradation digital data interconnects and storage timing signal interconnects.Type: GrantFiled: September 16, 2004Date of Patent: April 7, 2009Assignees: NEC Corporation, NEC Electronics CorporationInventors: Katsumi Abe, Masamichi Shimoda
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Publication number: 20090021466Abstract: Disclosed is a display apparatus including two scanning circuits of the same configuration and layout, arranged on either sides of the display part. As long as one of the scanning circuits is in operation, the other scanning circuit is in a state in which no output signal is output.Type: ApplicationFiled: July 17, 2008Publication date: January 22, 2009Applicant: NEC LCD TECHNOLOGIES, LTD.Inventors: Tomohiko OTOSE, Masamichi Shimoda
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Patent number: 7479937Abstract: A semiconductor device driving a current load device includes a constant current circuit with six V-I conversion circuit blocks, each including current mirror and V-I conversion circuits and output a current different from a current from other V-I conversion circuit blocks. In the current mirror, first and second transistor sources are connected to a power source. Gates of first and second transistors are connected to a the first transistor drain. The second transistor source is an output. In the VI conversion circuit, a current control voltage is input into a non-inversion input of an operational amplifier, an inversion input of the operational amplifier connects to one terminal of a variable resistor with the other grounded. An output of the operational amplifier is connected to the third transistor gate. The third transistor drain is connected to the first transistor drain. The source is connected to one terminal of the variable resistor.Type: GrantFiled: November 8, 2004Date of Patent: January 20, 2009Assignees: NEC Corporation, NEC Electronics CorporationInventor: Masamichi Shimoda
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Patent number: 7471268Abstract: An object of the present invention is to provide a display device for making it possible to accurately adjust a gradation current even if there is a variation in characteristics of a transistor for driving an organic EL element in a display device using an organic EL element. The following are included: a current detecting circuit for detecting a current circulating through a light emitting element, a current adjustment control circuit for comparing the detected current value with a reference current value and adjusting a current to be supplied to the light emitting element of a display portion in accordance with the comparison result, and a reference current circuit for generating a reference current correspondingly to the adjusted current. Moreover, a reference current circuit is formed on the substrate same as the substrate on which a light emitting element of a display portion is formed.Type: GrantFiled: August 4, 2004Date of Patent: December 30, 2008Assignees: NEC Corporation, NEC Electronics CorporationInventor: Masamichi Shimoda
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Publication number: 20080238384Abstract: A current source circuit includes a voltage output section which outputs a voltage signal; a current source section and a conversion section. The current source section has at least one current source block comprising a plurality of current sources, each of which outputs an output current. The conversion section is provided between the voltage output section and the current source section and outputs a reference current to the plurality of current sources of the at least one current source block based on the voltage signal such that the output current from each of the plurality of current sources is set based on the reference current.Type: ApplicationFiled: April 30, 2008Publication date: October 2, 2008Applicant: NEC Electronics CorporationInventors: Katsuyuki Fujikura, Katsumi Abe, Masamichi Shimoda
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Patent number: 7427892Abstract: A current source circuit includes a voltage output section which outputs a voltage signal; a current source section and a conversion section. The current source section has at least one current source block comprising a plurality of current sources, each of which outputs an output current. The conversion section is provided between the voltage output section and the current source section and outputs a reference current to the plurality of current sources of the at least one current source block based on the voltage signal such that the output current from each of the plurality of current sources is set based on the reference current.Type: GrantFiled: June 24, 2004Date of Patent: September 23, 2008Assignees: NEC Electronics Corporation, NEC CorporationInventors: Katsuyuki Fujikura, Katsumi Abe, Masamichi Shimoda
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Patent number: 7307605Abstract: A precharge circuit is provided with an N-channel transistor intended for switching. A reference potential is applied to either one of the source and drain of this N-channel transistor. The other of the source and drain is connected to a node. A precharge signal is applied to the gate of the N-channel transistor. The reference potential is set to a precharge output potential for the case of displaying black on a pixel, i.e., the potential when a minimum current flows through a P-channel transistor connected to the other of the source and drain of the N-channel transistor.Type: GrantFiled: December 1, 2004Date of Patent: December 11, 2007Assignee: NEC Corporation and NEC Electronics CorporationInventors: Masamichi Shimoda, Katsumi Abe, Koichi Iguchi
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Publication number: 20070120808Abstract: A liquid crystal display unit includes a control section. The control section reads LED electric current data stored in a storage section based on input information to control a backlight drive section, and controls an LCD panel based on the input information and a video signal. The backlight drive section provides a backlight with an electric current according to the LED electric current data. The LED electric current data outputted to the backlight drive section from the control section and image data outputted to the LCD panel from the control section are transmitted via a common signal line.Type: ApplicationFiled: May 25, 2006Publication date: May 31, 2007Applicant: NEC CorporationInventors: Masamichi Shimoda, Daisuke Suzuki, Tatsuya Uchikawa
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Publication number: 20070057764Abstract: A mobile communication terminal having a security function using biological information for authentication includes: authentication units for performing authentication based on at least two kinds of biological information; and a control unit for performing operational control of the authentication units. The control unit has a function of proceeding with capturing of biological information and authentication processing based on the captured biological information, performed for the respective kinds of biological information by the authentication units, in parallel.Type: ApplicationFiled: September 7, 2006Publication date: March 15, 2007Inventors: Tetsushi Sato, Masamichi Shimoda, Hideki Asada, Tatsuya Uchikawa, Daisuke Suzuki
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Publication number: 20060262074Abstract: There is disclosed a shift register comprising a bootstrap circuit that outputs a voltage of the supply voltage to the output when the voltage of a first node becomes higher or lower than the supply voltage. The shift register comprises: two or more transistors connected in series to the first node; a device for supplying the voltage to a second node between the transistors such that the voltage between the drains and sources of the transistors becomes below the supply voltage; a first input transistor connected to the first node, and the gate electrode thereof is connected to a first input terminal as well; and an output transistor connected to the output terminal and the clock signal while having the gate electrode connected to the first node, wherein the gate electrode of the output transistor is not opened except for the bootstrap period.Type: ApplicationFiled: May 22, 2006Publication date: November 23, 2006Applicants: NEC Corporation, NEC LCD Technologies, Ltd.Inventor: Masamichi Shimoda
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Publication number: 20050116747Abstract: A precharge circuit is provided with an N-channel transistor intended for switching. A reference potential is applied to either one of the source and drain of this N-channel transistor. The other of the source and drain is connected to a node. A precharge signal is applied to the gate of the N-channel transistor. The reference potential is set to a precharge output potential for the case of displaying black on a pixel, i.e., the potential when a minimum current flows through a P-channel transistor connected to the other of the source and drain of the N-channel transistor.Type: ApplicationFiled: December 1, 2004Publication date: June 2, 2005Inventors: Masamichi Shimoda, Katsumi Abe, Koichi Iguchi
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Publication number: 20050104819Abstract: A semiconductor device driving a current load device includes a constant current circuit with six V-I conversion circuit blocks, each including current mirror and V-I conversion circuits and output a current different from a current from other V-I conversion circuit blocks. In the current mirror, first and second transistor sources are connected to a power source. Gates of first and second transistors are connected to a the first transistor drain. The second transistor source is an output. In the V-I conversion circuit, a current control voltage is input into a non-inversion input of an operational amplifier, an inversion input of the operational amplifier connects to one terminal of a variable resistor with the other grounded. An output of the operational amplifier is connected to the third transistor gate. The third transistor drain is connected to the first transistor drain. The source is connected to one terminal of the variable resistor.Type: ApplicationFiled: November 8, 2004Publication date: May 19, 2005Applicants: NEC CORPORATION, NEC ELECTRONICS CORPORATIONInventor: Masamichi Shimoda