Abstract: A level conversion circuit (10) includes an EFET (11), a diode (12) and resistors (13, 14). The drain of the EFET (11) is connected to an output terminal of the level conversion circuit (10). The drain and the gate of the EFET (11) are in conductive contact with each other. The source of the EFET (11) is grounded via the resistor (13). The drain of the EFET (11) is connected to one end of the resistor (14). The other end of the resistor (14) is connected to the cathode of the diode (12). The anode of the diode (12) is connected to a control voltage input terminal.

Abstract: A semiconductor package includes the following elements. A high-output switch IC includes an IC top surface on which an electrode is disposed and an IC bottom surface on which no electrode is disposed. A connecting terminal is formed at a position outside a projection region toward a side portion of the semiconductor package. The projection region is a region projected in a thickness direction of the high-output switch IC. A wire electrically connects the electrode and the connecting terminal. A mold resin section covers the IC top surface and the wire and also covers a surface of the connecting terminal to which the wire is connected. A surface of the connecting terminal opposite to the surface to which the wire is connected is not covered with the mold resin section but is exposed. The IC bottom surface is not covered with a metal.

Abstract: A level conversion circuit (10) includes an EFET (11), a diode (12) and resistors (13, 14). The drain of the EFET (11) is connected to an output terminal of the level conversion circuit (10). The drain and the gate of the EFET (11) are in conductive contact with each other. The source of the EFET (11) is grounded via the resistor (13). The drain of the EFET (11) is connected to one end of the resistor (14). The other end of the resistor (14) is connected to the cathode of the diode (12). The anode of the diode (12) is connected to a control voltage input terminal.