Abstract: A semiconductor device (e.g., hetero-junction field-effect transistor) which has decreased capacitance between the gate and drain, and which has decreased source resistance, is provided. Structure in which a contact layer 6 comes in contact with the side surfaces of a channel layer 3 but does not come in contact with the side surfaces of a barrier layer 4 enables capacitance between the gate and drain to be decreased. This capacitance can be decreased down to 1.5 pF per 10 .mu.m of the width.

Abstract: A field effect transistor and a ballistic transistor using semiconductor whiskers each having a desired diameter and formed at s desired location, a semiconductor vacuum microelectronic device using the same as electron emitting materials, a light emitting device using the same as quantum wires and the like are disclosed.

Abstract: A field-effect transistor or a bipolar transistor may be provided in which the contact resistance between a channel layer or base layer and a contact layer are reduced. For example, an InGaAs buffer layer may be formed on the substrate side of an InGaAs channel layer of a field-effect transistor and by the bypassing effect that carriers pass through this InGaAs buffer layer, the InGaAs channel layer comes in contact with the contact layer with a low resistance. The contact resistance between the InGaAs channel layer and the contact layer can be reduced to 10 ohm per a width of 10.mu.m, and as a result, the value of transconductance factor K of a field-effect transistor can be increased in 14 mA/V.sup.2 per a width of 10.mu.m.