Patents by Inventor Masanari HATTORI

Masanari HATTORI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Nonvolatile semiconductor memory device and method for manufacturing same
    Patent number: 9059303
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes: a first stacked body having a gate insulating film, a first charge storage layer, a first insulating film, a second charge storage layer, and a second insulating film, a second element isolation region, a bottom and at least part of a side portion of the second element isolation region being in contact with the semiconductor substrate in the peripheral portion; and a second stacked body, a third insulating film, a first layer, a fourth insulating film, a second layer, and the second insulating film are stacked in this order from the semiconductor substrate side between the semiconductor substrate and the control gate electrode in the second stacked body in the peripheral portion, a side portion of the second stacked body being covered with the second insulating film.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: June 16, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Aoyama, Tatsuya Okamoto, Hiroki Yamashita, Masanari Hattori
  • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
    Publication number: 20150069495
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes: a first stacked body having a gate insulating film, a first charge storage layer, a first insulating film, a second charge storage layer, and a second insulating film, a second element isolation region, a bottom and at least part of a side portion of the second element isolation region being in contact with the semiconductor substrate in the peripheral portion; and a second stacked body, a third insulating film, a first layer, a fourth insulating film, a second layer, and the second insulating film are stacked in this order from the semiconductor substrate side between the semiconductor substrate and the control gate electrode in the second stacked body in the peripheral portion, a side portion of the second stacked body being covered with the second insulating film.
    Type: Application
    Filed: January 24, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kenji AOYAMA, Tatsuya OKAMOTO, Hiroki YAMASHITA, Masanari HATTORI