Patents by Inventor Masanobu Hatanaka
Masanobu Hatanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11770986Abstract: A resistive switching memory stack, comprised of a bottom electrode, an oxide layer located on the bottom electrode; and a top electrode located on the oxide layer. The top electrode is comprised of a first layer, an intermediate layer located directly on the first layer, and a top layer located on top of the intermediate layer. Wherein the intermediate layer is comprised of a doped carbide active layer.Type: GrantFiled: April 22, 2021Date of Patent: September 26, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John Rozen, Marinus Hopstaken, Yohei Ogawa, Masanobu Hatanaka, Takashi Ando, Kazuhiro Honda
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Publication number: 20220344586Abstract: A resistive switching memory stack, comprised of a bottom electrode, an oxide layer located on the bottom electrode; and a top electrode located on the oxide layer. The top electrode is comprised of a first layer, an intermediate layer located directly on the first layer, and a top layer located on top of the intermediate layer. Wherein the intermediate layer is comprised of a doped carbide active layer.Type: ApplicationFiled: April 22, 2021Publication date: October 27, 2022Inventors: John Rozen, Marinus Hopstaken, Yohei Ogawa, Masanobu Hatanaka, Takashi Ando, Kazuhiro Honda
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Patent number: 11195929Abstract: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 ?. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.Type: GrantFiled: October 30, 2019Date of Patent: December 7, 2021Assignees: International Business Machines Corporation, ULVAC, INC.Inventors: Takashi Ando, Ruqiang Bao, Masanobu Hatanaka, Vijay Narayanan, Yohei Ogawa, John Rozen
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Patent number: 11189482Abstract: A thin film formation method includes setting a film formation subject to 200° C. or higher. A first step includes changing a first state, in which a film formation material and a carrier gas are supplied so that the film formation material collects on the film formation subject, to a second state, in which the film formation material is omitted. A second step includes changing a third state, in which a hydrogen gas and a carrier gas are supplied to reduce the film formation material, to a fourth state, in which the hydrogen gas is omitted. The film formation material is any one of Al(CxH2x+1)3, Al(CxH2x+1)2H, and Al(CxH2x+1)2Cl. The first step and the second step are alternately repeated to form an aluminum carbide film on the film formation subject such that a content rate of aluminum atoms is 20 atomic percent or greater.Type: GrantFiled: May 11, 2018Date of Patent: November 30, 2021Assignees: ULVAC, INC., INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Masanobu Hatanaka, Yohei Ogawa, Keon-chang Lee, Nobuyuki Kato, Takakazu Yamada, John Rozen
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Publication number: 20200066859Abstract: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 ?. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.Type: ApplicationFiled: October 30, 2019Publication date: February 27, 2020Inventors: Takashi Ando, Ruqiang Bao, Masanobu Hatanaka, Vijay Narayanan, Yohei Ogawa, John Rozen
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Patent number: 10529815Abstract: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 ?. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.Type: GrantFiled: October 31, 2017Date of Patent: January 7, 2020Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, ULVAC, INC.Inventors: Takashi Ando, Ruqiang Bao, Masanobu Hatanaka, Vijay Narayanan, Yohei Ogawa, John Rozen
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Publication number: 20190355576Abstract: This method comprises: a first step for raising the temperature of an object on which a film is being formed to at least 200° C. and changing from a first state in which a film-forming material and a carrier gas are supplied to the object on which the film is being formed to deposit the film-forming material on the object on which the film is being formed to a second state in which the supply of the film-forming material is eliminated from the first state; and a second step for raising the temperature of the object on which the film is being formed to at least 200° C. and changing from a third state in which hydrogen gas and a carrier gas are supplied to the object on which the film is being formed to reduce the film-forming material to a fourth state in which the supply of the hydrogen gas is eliminated from the third state. The film-forming material is any one material selected from the group consisting of Al(CxH2x+1)3, Al(CxH2x+1)2H, and Al(CxH2x+1)2Cl.Type: ApplicationFiled: May 11, 2018Publication date: November 21, 2019Inventors: Masanobu HATANAKA, Yohei OGAWA, Keon-chang LEE, Nobuyuki KATO, Takakazu YAMADA, John ROZEN
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Publication number: 20190131418Abstract: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 ?. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.Type: ApplicationFiled: October 31, 2017Publication date: May 2, 2019Inventors: Takashi Ando, Ruqiang Bao, Masanobu Hatanaka, Vijay Narayanan, Yohei Ogawa, John Rozen
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Patent number: 9984940Abstract: A scaled dielectric stack interlayer, compatible with subsequent high temperature processing with good electrical transport & reliability properties is provided. A method for forming a conformal aSi:H passivation layer on a semiconductor device is described. A patterned semiconductor wafer is placed in in a process chamber with a first layer formed thereon and a second layer formed thereon, the first layer and the second layer being two different materials Next, a SixH(2x+2) based deposition up to a temperature of 400 degrees Celsius is used on the first layer and the second layer thereby forming a conformal aSi:H passivating layer is formed at a higher rate of deposition on the first layer selectively and a lower rate of deposit on the second layer.Type: GrantFiled: January 30, 2017Date of Patent: May 29, 2018Assignee: International Business Machines CorporationInventors: Jack O. Chu, Stephen M. Gates, Masanobu Hatanaka, Vijay Narayanan, Deborah A. Neumayer, Yohei Ogawa, John Rozen
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Patent number: 8536588Abstract: A display device and a method of manufacturing the same, the display includes: an electrode plate operable to have a radio-frequency wave to pass therethrough; a light-emitting portion disposed in a direction of one surface of the electrode plate, the light-emitting portion including the electrode plate serving as a back electrode; and an antenna disposed in a direction of another surface of the electrode plate, the antenna having a stripline structure or a microstrip line structure and using a potential of the electrode plate as a reference potential.Type: GrantFiled: September 9, 2010Date of Patent: September 17, 2013Assignee: Fujitsu LimitedInventors: Yuji Takahashi, Toru Ozaki, Masanobu Hatanaka, Hirohisa Naito, Takahiro Kii, Kazumi Kubota, Akira Miyazaki, Takefumi Horie, Kiyohiko Ikeda
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Patent number: 8419854Abstract: In a film-forming apparatus in which two or more gases are used, a uniform film is formed. In a film-forming apparatus provided with a film-forming chamber and a shower head, the shower head is provided with a material gas diffusion chamber and a reactive gas diffusion chamber. A gas passage which communicates the material gas diffusion chamber and a material gas introduction pipe is constituted into multi-stages of one stage or more. Each stage has a gas passage represented by 2n-1 (where n is the number of stages). The first-stage gas passage has connected to the center thereof the material gas introduction pipe. Each of second-stage and subsequent-stage gas passages has connected to the center thereof connection holes which are provided on both ends of the previous-stage gas passages so as to be in communication with the previous-stage gas passages. Each of the final-stage gas passages is connected to the material gas diffusion chamber by connection holes formed on both ends of each of the gas passages.Type: GrantFiled: April 15, 2008Date of Patent: April 16, 2013Assignee: Ulvac, Inc.Inventors: Masanobu Hatanaka, Osamu Irino, Michio Ishikawa
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Patent number: 8367542Abstract: A method for manufacturing a semiconductor device that improves the reliability of a metal cap layer and productivity. The method includes an insulation layer step of superimposing an insulation layer(11) on a semiconductor substrate (2) including an element region (2b), a recess step of forming a recess (12) in the insulation layer (11), a metal layer step of embedding a metal layer (13) in the recess (12), a planarization step of planarizing a surface of the insulation layer (11) and a surface of the metal layer (13) to be substantially flush with each other, and a metal cap layer step of forming a metal cap layer (16) containing at least zirconium element and nitrogen element on the surface of the insulation layer (11) and the surface of the metal layer (13) after the planarization step.Type: GrantFiled: October 14, 2011Date of Patent: February 5, 2013Assignee: ULVAC, Inc.Inventors: Masanobu Hatanaka, Kanako Tsumagari, Michio Ishikawa
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Patent number: 8252113Abstract: The object of this invention is to provide a method for producing a component for vacuum apparatus and a resin coating forming apparatus capable of easily forming a resin coating on an internal flow path complex in shape. The resin coating forming apparatus (21) comprises a monomer vapor supplying unit (23), a vacuum pumping line (24) for transporting monomer vapor, a connection portion (24c) connectable with the internal flow path of a component (22A) provided on part of the vacuum pumping line (24), and a temperature adjusting unit (31) for depositing the monomer vapor onto the internal flow path of the component (22A) connected with the connection portion (24c) to form a resin coating. The above arrangement permits the formation of a uniform, high-coverage resin coating on the internal flow path of the component (22A) by merely exposing the internal flow path to monomer vapor.Type: GrantFiled: March 23, 2006Date of Patent: August 28, 2012Assignee: ULVAC, Inc.Inventors: Masanobu Hatanaka, Yoshikazu Takahashi, Michio Ishikawa, Fumio Nakamura
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Patent number: 8171519Abstract: A video broadcasting method includes assigning channels to a video content based on a total number of channels usable for broadcasting the video contents and a playback time of the video content, calculating a broadcast start time interval of the channels assigned to the video content based on the playback time of the video content and number of the channels assigned to the video content setting broadcast start time per channel of the channels assigned to the video content, and broadcasting the video content at the broadcast start time set per the channel.Type: GrantFiled: January 23, 2009Date of Patent: May 1, 2012Assignee: Fujitsu LimitedInventors: Takahiro Kii, Hirohisa Naito, Kazumi Kubota, Akira Miyazaki, Yuji Takahashi, Masanobu Hatanaka, Toru Ozaki
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Publication number: 20120031650Abstract: A method for manufacturing a semiconductor device that improves the reliability of a metal cap layer and productivity. The method includes an insulation layer step of superimposing an insulation layer(11) on a semiconductor substrate (2) including an element region (2b), a recess step of forming a recess (12) in the insulation layer (11), a metal layer step of embedding a metal layer (13) in the recess (12), a planarization step of planarizing a surface of the insulation layer (11) and a surface of the metal layer (13) to be substantially flush with each other, and a metal cap layer step of forming a metal cap layer (16) containing at least zirconium element and nitrogen element on the surface of the insulation layer (11) and the surface of the metal layer (13) after the planarization step.Type: ApplicationFiled: October 14, 2011Publication date: February 9, 2012Applicant: ULVAC, INC.Inventors: Masanobu Hatanaka, Kanako Tsumagari, Michio Ishikawa
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Patent number: 8094089Abstract: A display control device includes: a priority order searching unit that searches a priority order management table to retrieve the priority level corresponding to the standby content screen that has stopped being displayed on a display device related to a usage starting operation when the usage starting operation is detected from any of display devices in the standby state; a switch display target designating unit that retrieves display devices displaying standby content screens of lower priority levels than the retrieved standby content screen, and designates a display device as the switch display target that is the display device displaying the standby content screen of the lowest priority level; and a display control unit that causes the designated display device of the switch display target to switchingly display the standby content screen that has stopped being displayed on the display device related to the usage starting operation.Type: GrantFiled: September 28, 2010Date of Patent: January 10, 2012Assignee: Fujitsu LimitedInventors: Akira Miyazaki, Toru Ozaki, Masanobu Hatanaka, Hirohisa Naito, Takahiro Kii, Kazumi Kubota, Yuji Takahashi
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Patent number: 8084368Abstract: A barrier film made of a ZrB2 film is formed by use of a coating apparatus provided with plasma generation means including a coaxial resonant cavity and a microwave supply circuit for exciting the coaxial resonant cavity, the coaxial resonant cavity including spaced apart conductors provided around the periphery of a nonmetallic pipe for reactive gas introduction, the coaxial resonant cavity having an inner height equal to an integer multiple of one-half of the exciting wavelength, the plasma generation means being constructed such that a gas injected from one end of the nonmetallic pipe is excited into a plasma state by a microwave when the gas is in a region of the nonmetallic pipe which is not covered with the conductors and such that the gas in the plasma state is discharged from the other end of the nonmetallic pipe.Type: GrantFiled: November 8, 2007Date of Patent: December 27, 2011Assignee: Ulvac, Inc.Inventors: Masanobu Hatanaka, Michio Ishikawa, Kanako Tsumagari
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Patent number: 8058974Abstract: An electric signal is allowed to reach loop antennas disposed adjacently to one another from an RFID antenna as a starting point by electromagnetic induction, which permits one IC chip processing device to exert a function equivalent to that exerted by a plurality of IC chip processing devices. Further, the loop antennas are superimposed on a display screen of a display system of an information providing apparatus, and the display screen is transparently visible, and therefore it makes possible to utilize a display surface of display contents on the display screen as an IC chip reading surface and dispose a plurality of reading surfaces showing different services provided.Type: GrantFiled: March 31, 2009Date of Patent: November 15, 2011Assignee: Fujitsu LimitedInventors: Yuji Takahashi, Toru Ozaki, Masanobu Hatanaka, Hirohisa Naito, Takahiro Kii, Kazumi Kubota, Akira Miyazaki
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Patent number: 8043963Abstract: A method for manufacturing a semiconductor device that improves the reliability of a metal cap layer and productivity. The method includes an insulation layer step of superimposing an insulation layer (11) on a semiconductor substrate (2) including an element region (2b), a recess step of forming a recess (12) in the insulation layer (11), a metal layer step of embedding a metal layer (13) in the recess (12), a planarization step of planarizing a surface of the insulation layer (11) and a surface of the metal layer (13) to be substantially flush with each other, and a metal cap layer step of forming a metal cap layer (16) containing at least zirconium element and nitrogen element on the surface of the insulation layer (11) and the surface of the metal layer (13) after the planarization step.Type: GrantFiled: February 25, 2008Date of Patent: October 25, 2011Assignee: Ulvac, Inc.Inventors: Masanobu Hatanaka, Kanako Tsumagari, Michio Ishikawa
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Publication number: 20110227800Abstract: A display device and a method of manufacturing the same, the display includes: an electrode plate operable to have a radio-frequency wave to pass therethrough; a light-emitting portion disposed in a direction of one surface of the electrode plate, the light-emitting portion including the electrode plate serving as a back electrode; and an antenna disposed in a direction of another surface of the electrode plate, the antenna having a stripline structure or a microstrip line structure and using a potential of the electrode plate as a reference potential.Type: ApplicationFiled: September 9, 2010Publication date: September 22, 2011Applicant: FUJITSU LIMITEDInventors: Yuji TAKAHASHI, Toru Ozaki, Masanobu Hatanaka, Hirohisa Naito, Takahiro Kii, Kazumi Kubota, Akira Miyazaki, Takefumi Horie, Kiyohiko Ikeda