Patents by Inventor Masanobu Katagi

Masanobu Katagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110185303
    Abstract: There is provided a power management apparatus including an authentication processing unit that carries out an authentication process on each individual electronic appliance that is to be managed, a consumption amount acquiring unit that acquires information on power consumption from the electronic appliance, and an information display unit that displays an authentication state or an authentication result obtained from the authentication processing unit, together with the information on power consumption acquired by the consumption amount acquiring unit.
    Type: Application
    Filed: January 6, 2011
    Publication date: July 28, 2011
    Inventors: Masanobu KATAGI, Asami YOSHIDA, Tomoyuki ASANO, Masakazu UKITA, Yohei KAWAMOTO, Shiho MORIAI, Seiichi MATSUDA, Yu TANAKA
  • Publication number: 20110184580
    Abstract: There is provided an electronic watermark generating apparatus including an appliance characterizing information generating unit that generates appliance characterizing information that characterizes an electronic appliance, by using physical data acquired by a sensor that measures characteristics of the electronic appliance, an electronic watermark generating unit that generates, in relation to the appliance characterizing information, electronic watermark information that is used for detecting whether information has been tampered with or not, an embedded position deciding unit that analyzes the appliance characterizing information, and decides an embedded position for the electronic watermark information in the appliance characterizing information, and an electronic watermark embedding unit that embeds the electronic watermark information generated by the electronic watermark generating unit in a position on the appliance characterizing information decided by the embedded position deciding unit.
    Type: Application
    Filed: January 18, 2011
    Publication date: July 28, 2011
    Inventors: Yohei KAWAMOTO, Asami Yoshida, Tomoyuki Asano, Masakazu Ukita, Shiho Moriai, Masanobu Katagi, Yu Tanaka, Seiichi Matsuda
  • Publication number: 20110184584
    Abstract: Provided is a power management apparatus including an other-apparatus confirming unit that confirms presence of another power management apparatus that is operating that is managing a same electronic appliance, an attribute recognizing unit that recognizes, if N?1 (N?2) power management apparatuses are confirmed to be operating, an attribute of one specific apparatus, among N power management apparatuses including its own power management apparatus, to be a parent device and the attributes of remaining N?1 apparatuses to be a child device, a signal collecting unit that collects from N?1 child devices, if the attribute of its own power management apparatus is recognized to be the parent device, control signals for controlling the electronic appliance, and a signal selecting unit that selects, among the collected control signals, control signals of the same type, the number of which is largest, and transmits the control signals to the electronic appliance.
    Type: Application
    Filed: January 13, 2011
    Publication date: July 28, 2011
    Inventors: Masakazu UKITA, Asami Yoshida, Tomoyuki Asano, Shiho Moriai, Masanobu Katagi, Yohei Kawamoto, Seiichi Matsuda, Yu Tanaka
  • Publication number: 20110185197
    Abstract: There is provided an outlet expansion apparatus including a first connection outlet to which an electronic appliance is to be connected, a second connection outlet that is for connecting to a power supply outlet that is to be a supply source of power, and a delegate authentication unit that carries out, in a case the electronic appliance not having a function of carrying out authentication with a power management apparatus managing an amount of power to be supplied to the electronic appliance is connected to the first connection outlet and the power supply outlet is connected to the second connection outlet, authentication to be carried out on the power management apparatus by the electronic appliance connected to the first connection outlet on behalf of the electronic appliance.
    Type: Application
    Filed: January 18, 2011
    Publication date: July 28, 2011
    Inventors: Masakazu UKITA, Yu Tanaka, Asami Yoshida, Tomoyuki Asano, Shiho Moriai, Masanobu Katagi, Yohei Kawamoto, Seiichi Matsuda
  • Publication number: 20110185198
    Abstract: There is provided an electronic appliance including a plurality of electrical parts having electrical characteristics that are different thereamong and for each electronic appliance, a characteristics measuring unit that measures the characteristics of at least one electrical part, a switch that switches between the electrical parts whose characteristics are to be measured by the characteristics measuring unit, and a control unit that controls the switch and causes the characteristics measuring unit to measure the characteristics of a predetermined electrical part, and that transmits, to a power management apparatus managing at least power supply to its own electronic appliance, information relating to the characteristics measured by the characteristics measuring unit and an appliance ID of its own electronic appliance.
    Type: Application
    Filed: January 18, 2011
    Publication date: July 28, 2011
    Inventors: Masakazu UKITA, Asami Yoshida, Tomoyuki Asano, Shiho Moriai, Masanobu Katagi, Yohei Kawamoto, Seiichi Matsuda, Yu Tanaka
  • Publication number: 20110183733
    Abstract: There is provided a power management apparatus including a game service providing unit providing, to an electronic appliance, a service using game contents whose theme is power. The game service providing unit includes a game control unit controlling execution of the game contents, a real world constructing unit constructing a setting of a game reflecting a real-world environment, based on managed appliance information stored in a database, and a virtual world constructing unit constructing a setting of the game reflecting a virtual environment, based on a setting set in advance in the game contents. The game control unit is operable to initialize the game contents by combining the setting of the game constructed by the real world constructing unit and the setting of the game constructed by the virtual world constructing unit.
    Type: Application
    Filed: January 18, 2011
    Publication date: July 28, 2011
    Inventors: Asami YOSHIDA, Masanobu KATAGI, Shiho MORIAI, Tomoyuki ASANO, Masakazu UKITA, Yohei KAWAMOTO, Yu TANAKA, Seiichi MATSUDA
  • Publication number: 20110185196
    Abstract: There is provided a power management apparatus including: a managed appliance registering unit carrying out authentication on an electronic appliance connected to a power network and registering an electronic appliance for which the authentication has succeeded as a managed appliance, a control unit controlling operation of the managed appliance and supplying of power to the managed appliance, a managed appliance information acquiring unit acquiring, from the managed appliance, as managed appliance information, at least any of appliance information including identification information that is unique to the electronic appliance, information indicating an operation state of the electronic appliance, information indicating an usage state of the electronic appliance and power information of the electronic appliance, and an appliance state judging unit judging a state of the managed appliance based on the managed appliance information acquired by the managed appliance information acquiring unit.
    Type: Application
    Filed: January 13, 2011
    Publication date: July 28, 2011
    Inventors: Tomoyuki ASANO, Shiho Moriai, Yohei Kawamoto, Masakazu Ukita, Yu Tanaka, Asami Yoshida, Masanobu Katagi, Seiichi Matsuda
  • Publication number: 20110184585
    Abstract: There is provided a power management apparatus including: a managed appliance registering unit carrying out authentication on an electronic appliance connected to a power network and registering the electronic appliance as a managed appliance if the authentication has succeeded; and a control unit controlling operation of and supplying of power to the managed appliance.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 28, 2011
    Inventors: Seiichi MATSUDA, MASANOBU KATAGI, ASAMI YOSHIDA, TOMOYUKI ASANO, SHIHO MORIAI, MASAKAZU UKITA, YOHEI KAWAMOTO, YU TANAKA
  • Publication number: 20110184586
    Abstract: There is provided a power management apparatus including a managed appliance registering unit that carries out authentication on an electronic appliance connected to a power network, and registers an electronic appliance for which the authentication has succeeded as a managed appliance, and a control unit that controls operation of the managed appliance and supplying of power to the managed appliance. The managed appliance registering unit transmits, to one or more electronic appliances, a challenge message that is used when registering an electronic appliance, and collectively verifies one or more response messages sent back from the one or more electronic appliances in reply to the challenge message.
    Type: Application
    Filed: January 18, 2011
    Publication date: July 28, 2011
    Inventors: Tomoyuki ASANO, Asami Yoshida, Shiho Moriai, Masakazu Ukita, Masanobu Katagi, Yohei Kawamoto, Seiichi Matsuda, Yu Tanaka
  • Patent number: 7957527
    Abstract: An apparatus and a method for performing a hyperelliptic curve cryptography process at a high speed in a highly secure manner are provided. A base point D is produced such that the base point D and one or more of precalculated data in addition to the base point used in a scalar multiplication operation based on a window algorithm are degenerate divisors with a weight smaller than genus g of a hyperelliptic curve. An addition operation included in the scalar multiplication operation based on the window algorithm is accomplished by performing an addition operation of adding a degenerate divisor and a non-degenerate divisor, whereby a high-speed operation is achieved without causing degradation in security against key analysis attacks such as SPA.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: June 7, 2011
    Assignee: Sony Corporation
    Inventors: Masanobu Katagi, Toru Akishita, Izuru Kitamura, Tsuyoshi Takagi
  • Publication number: 20100293424
    Abstract: A semiconductor integrated circuit includes: a plurality of flip-flops connected to a scan chain set as a test path of an integrated circuit; and a data-collection section inputting setting values of the plurality of flip-flops connected to the scan chain through the scan chain or an independent connection path, wherein the data-collection section inputs the setting values of the flip-flops at the time the power has been turned on to the plurality of flip-flops, and performs generation processing of random numbers, or random-number generation data, or fixed data on the basis of the input values.
    Type: Application
    Filed: May 10, 2010
    Publication date: November 18, 2010
    Inventors: Masanobu Katagi, Asami Yoshida, Hirotake Yamamoto
  • Patent number: 7835517
    Abstract: An encryption processing apparatus for performing a scalar multiplication of kP+lQ based on two points P and Q on an elliptic curve and scalar values k and l or a scalar multiplication of kD1+lD2 based on divisors D1 and D2 and scalar values k and l may include a scalar value controller configured to generate joint regular form of (k, l), k=<kn, . . . k0> and l=<ln, . . . l0>, which are set so that all the bits of the scalar values k and l are represented by 0, +1, or ?1, and the combination (ki, li) of bits at positions corresponding to the scalar values k and l is set to satisfy (ki, li)=(0, ±1) or (±1, 0); and a computation execution section configured to perform a process for computing a scalar multiplication of kP+lQ or kD1+lD2.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: November 16, 2010
    Assignee: Sony Corporation
    Inventors: Toru Akishita, Masanobu Katagi
  • Publication number: 20100183142
    Abstract: An apparatus and method for performing a high-speed operation in a hyperelliptic curve cryptography process are provided. If a standard divisor having a weight equal to a genus g in the hyperelliptic curve cryptography of genus g is a target divisor of scalar multiplication, a determination as to whether the standard divisor is divisible into a theta divisor defined as a divisor having a weight less than the genus g is determined, and if the standard divisor is divisible, the theta divisor is generated by dividing the standard divisor, and a scalar multiplication executing block performs the scalar multiplication using the theta divisor. With this arrangement, the scalar multiplication is performed at high speed with an amount of calculation reduced, and a high-speed encryption processing operation is thus performed.
    Type: Application
    Filed: January 4, 2007
    Publication date: July 22, 2010
    Applicant: SONY CORPORATION
    Inventors: Masanobu Katagi, Izuru Kitamura, Toru Akishita
  • Patent number: 7697683
    Abstract: A cryptography-processing method for carrying out computation processing of hyperelliptic curve cryptography at a high speed and a cryptography-processing apparatus for implementing the method. In execution of scalar multiplication processing, a divisor is selected among divisors each having a weight g.sub.0 smaller than the genus g of a hyperelliptic curve where 1?.g0.<g to serve as a base point. In hyperelliptic curve cryptography carried out in this configuration for a genus g of 2, computation processing of the scalar multiplication can be changed from HarleyADD to execution steps of ExHarADD2+1?2 with a small number of computation-processing steps. For a genus g of 3, on the other hand, computation processing of the scalar multiplication can be changed from HarleyADD to execution steps of ExHarADD3+?3. or EXHarADD3+1?3. with a small number of computation-processing steps. By changing the computation processing as described above, the processing speed can be increased.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: April 13, 2010
    Assignee: Sony Corporation
    Inventors: Masanobu Katagi, Toru Akishita, Izuru Kitamura, Tsuyoshi Takagi
  • Publication number: 20080095357
    Abstract: A system and method for achieving secure and fast computation in hyperelliptic cryptography is realized. Fast scalar multiplication is achieve by executing computing operations including halving as computing processing in scalar multiplication with respect to a divisor D in hyperelliptic curve cryptography. For example, computing operations including halving are executed in scalar multiplication with respect to a divisor D on a hyperelliptic curve of genus 2 in characteristic 2 having h(x)=x2+x+h0, f4=0 as parameters, a hyperelliptic curve of genus 2 in characteristic 2 having h(x)=x2+h1x+h0, f4=0 as parameters, or a hyperelliptic curve of genus 2 in characteristic 2 having h(x)=x as a parameter. Further, reduced complexity and faster computation are realized through the application of a table that records which of k1, k1?, (k0, k0?) is correct on the basis of a computed value of [½iD] with respect to a fixed divisor D, and through a reduction in the number of inversion operations.
    Type: Application
    Filed: September 26, 2005
    Publication date: April 24, 2008
    Applicant: SONY CORPORATION
    Inventors: Izuru Kitamura, Masanobu Katagi, Tsuyoshi Takagi
  • Publication number: 20070291937
    Abstract: An apparatus and a method for performing a hyperelliptic curve cryptography process at a high speed in a highly secure manner are provided. A base point D is produced such that the base point D and one or more of precalculated data in addition to the base point used in a scalar multiplication operation based on a window algorithm are degenerate divisors with a weight smaller than genus g of a hyperelliptic curve. An addition operation included in the scalar multiplication operation based on the window algorithm is accomplished by performing an addition operation of adding a degenerate divisor and a non-degenerate divisor, whereby a high-speed operation is achieved without causing degradation in security against key analysis attacks such as SPA.
    Type: Application
    Filed: November 15, 2005
    Publication date: December 20, 2007
    Inventors: Masanobu Katagi, Toru Akishita, Izuru Kitamura, Tsuyoshi Takagi
  • Publication number: 20070211894
    Abstract: An encryption processing apparatus for performing a scalar multiplication of kP+lQ based on two points P and Q on an elliptic curve and scalar values k and l or a scalar multiplication of kD1+lD2 based on divisors D1 and D2 and scalar values k and l may include a scalar value controller configured to generate joint regular form of (k, l), k=<kn, . . . k0> and l=<ln, . . . l0>, which are set so that all the bits of the scalar values k and l are represented by 0, +1, or ?1, and the combination (ki, li) of bits at positions corresponding to the scalar values k and l is set to satisfy (ki, li)=(0, ±1) or (±1, 0); and a computation execution section configured to perform a process for computing a scalar multiplication of kP+lQ or kD1+lD2.
    Type: Application
    Filed: January 12, 2007
    Publication date: September 13, 2007
    Applicant: Sony Corporation
    Inventors: Toru Akishita, Masanobu Katagi
  • Publication number: 20050201553
    Abstract: The present invention provides a cryptography-processing method for carrying out computation processing of hyperelliptic curve cryptography processing at a high speed and a cryptography-processing apparatus for implementing the method. In execution of scalar multiplication processing, a divisor is selected among divisors each having a weight g0 smaller than the genus g of a hyperelliptic curve where 1?g0<g to serve as a base point. In hyperelliptic curve cryptography carried out in this configuration for a genus g of 2, computation processing of the scalar multiplication can be changed from HarleyADD to execution steps of ExHarADD2+1?2 with a small number of computation-processing steps. For a genus g of 3, on the other hand, computation processing of the scalar multiplication can be changed from HarleyADD to execution steps of ExHarADD3+2?3 or ExHarADD3+1?3 with a small number of computation-processing steps. By changing the computation processing as described above, the processing speed can be increased.
    Type: Application
    Filed: February 25, 2005
    Publication date: September 15, 2005
    Inventors: Masanobu Katagi, Toru Akishita, Izuru Kitamura, Tsuyoshi Takagi