Patents by Inventor Masanori Kawade
Masanori Kawade has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8536696Abstract: A package substrate including an outermost interlayer resin insulating layer, a pad structure formed on the outermost interlayer resin insulating layer, a conductive connecting pin for establishing an electrical connection with another substrate, the conductive connecting pin being secured to the pad structure via a solder, and via holes formed through the outermost interlayer resin insulating layer and for electrically connecting the pad structure to one or more conductive circuits formed below the outermost interlayer resin insulating layer, the via holes being positioned directly below the pad structure.Type: GrantFiled: August 25, 2009Date of Patent: September 17, 2013Assignee: Ibiden Co., Ltd.Inventors: Naohiro Hirose, Hitoshi Ito, Yoshiyuki Iwata, Masanori Kawade, Hajime Yazu
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Patent number: 8426748Abstract: A lead pin comprising including a body having a shaft portion and a flange portion. The flange portion has at least one flat portion configured to face a connection pad and groove portions positioned to face toward the connection pad and extending from a peripheral portion toward a center portion of the flange portion, the flat portion includes extending portions extending from a center of the flange toward the peripheral portion of the flange and connected at the center of the flange, and the groove portions are tilted to become deeper toward the peripheral portion of the flange.Type: GrantFiled: March 17, 2010Date of Patent: April 23, 2013Assignee: Ibiden Co., Ltd.Inventors: Masanori Kawade, Hiroyuki Tsuruga, Makoto Ebina
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Patent number: 8110917Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a motherboard and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.Type: GrantFiled: October 19, 2009Date of Patent: February 7, 2012Assignee: IBIDEN Co., Ltd.Inventors: Naohiro Hirose, Hitoshi Ito, Yoshiyuki Iwata, Masanori Kawade, Hajime Yazu
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Patent number: 8035214Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a mother board and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.Type: GrantFiled: November 17, 1999Date of Patent: October 11, 2011Assignee: IBIDEN Co., Ltd.Inventors: Naohiro Hirose, Hitoshi Ito, Yoshiyuki Iwata, Masanori Kawade, Hajime Yazu
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Patent number: 7902659Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a mother board and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.Type: GrantFiled: January 26, 2009Date of Patent: March 8, 2011Assignee: Ibiden Co., Ltd.Inventors: Naohiro Hirose, Hitoshi Ito, Yoshiyuki Iwata, Masanori Kawade, Hajime Yazu
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Patent number: 7847393Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a mother board and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.Type: GrantFiled: October 24, 2008Date of Patent: December 7, 2010Assignee: IBIDEN Co., Ltd.Inventors: Naohiro Hirose, Hitoshi Ito, Yoshiyuki Iwata, Masanori Kawade, Hajime Yazu
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Publication number: 20100187004Abstract: A lead pin comprising including a body having a shaft portion and a flange portion. The flange portion has at least one flat portion configured to face a connection pad and groove portions positioned to face toward the connection pad and extending from a peripheral portion toward a center portion of the flange portion, the flat portion includes extending portions extending from a center of the flange toward the peripheral portion of the flange and connected at the center of the flange, and the groove portions are tilted to become deeper toward the peripheral portion of the flange.Type: ApplicationFiled: March 17, 2010Publication date: July 29, 2010Applicants: IBIDEN CO., LTD., TIBC CO. LTD.Inventors: Masanori KAWADE, Hiroyuki Tsuruga, Makoto Ebina
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Patent number: 7723620Abstract: A semiconductor loading lead pin that does not tilt at a time of reflow. A void is sometimes left in solder between an electrode pad and the flange of a semiconductor loading lead pin. When reflow is carried out to load an IC chip, the solder for connection is melted and at the same time, the void in the solder is expanded. The solder escapes sideway along the groove portion, and thereby a flange is not raised by the void so that the semiconductor loading lead pin is not tilted.Type: GrantFiled: August 30, 2005Date of Patent: May 25, 2010Assignees: IBIDEN Co., Ltd., TIBC Co., Ltd.Inventors: Masanori Kawade, Hiroyuki Tsuruga, Makoto Ebina
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Publication number: 20100032200Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a motherboard and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.Type: ApplicationFiled: October 19, 2009Publication date: February 11, 2010Applicant: IBIDEN CO., LTD.Inventors: Naohiro HIROSE, Hitoshi Ito, Yoshiyuki Iwata, Masanori Kawade, Hajime Yazu
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Publication number: 20090314537Abstract: A package substrate including an outermost interlayer resin insulating layer, a pad structure formed on the outermost interlayer resin insulating layer, a conductive connecting pin for establishing an electrical connection with another substrate, the conductive connecting pin being secured to the pad structure via a solder, and via holes formed through the outermost interlayer resin insulating layer and for electrically connecting the pad structure to one or more conductive circuits formed below the outermost interlayer resin insulating layer, the via holes being positioned directly below the pad structure.Type: ApplicationFiled: August 25, 2009Publication date: December 24, 2009Applicant: IBIDEN CO., LTD.Inventors: Naohiro HIROSE, Hitoshi ITO, Yoshiyuki IWATA, Masanori KAWADE, Hajime YAZU
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Publication number: 20090154131Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a mother board and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.Type: ApplicationFiled: January 26, 2009Publication date: June 18, 2009Applicant: IBIDEN CO., LTD.Inventors: Naohiro HIROSE, Hitoshi ITO, Yoshiyuki IWATA, Masanori KAWADE, Hajime YAZU
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Publication number: 20090053459Abstract: A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a mother board and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.Type: ApplicationFiled: October 24, 2008Publication date: February 26, 2009Applicant: IBIDEN CO., LTD.Inventors: Naohiro Hirose, Hitoshi Ito, Yoshiyuki Iwata, Masanori Kawade, Hajime Yazu
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Publication number: 20080055874Abstract: A semiconductor loading lead pin that does not tilt at a time of reflow. A void is sometimes left in solder between an electrode pad and the flange of a semiconductor loading lead pin. When reflow is carried out to load an IC chip, the solder for connection is melted and at the same time, the void in the solder is expanded. The solder escapes sideway along the groove portion, and thereby a flange is not raised by the void so that the semiconductor loading lead pin is not tilted.Type: ApplicationFiled: August 30, 2005Publication date: March 6, 2008Applicant: IBIDEN CO., LTD.Inventors: Masanori Kawade, Hiroyuki Tsuruga, Makoto Ebina